INTELLIGENT DYNAMIC CLOCK SWITCH PLL CLOCK DRIVER

GENERAL DESCRIPTION The XRK7988 is a PLL clock driver designed specifically for redundant clock tree designs. The device receives two differential LVPECL clock signals from which it generates 5 new differential LVPECL clock outputs. Two of the output pairs regenerate the input signals frequency

INTELLIGENT DYNAMIC CLOCK SWITCH PLL CLOCK DRIVER

Low Skew, Category 5e, 4-24 AWG pairs, CMP

Product Description Category 5e, 24 AWG bonded pairs solid bare copper conductors, plenum, FEP Teflon® insulation, skew 9.0ns/100m nominal, rip cord, Flamarrest® jacket.

Low Skew, Category 5e, 4-24 AWG pairs, CMR

Product Description Category 5e, 24 AWG bonded pairs solid bare copper conductors, non-plenum, polyolefin insulation, skew 9.0ns/100m nominal, rip cord, PVC jacket.

16-Bit, 2 MSPS, 關Module Data Acquisition Solution

文件：3.65397 Mbytes Page：38 Pages

16-Bit, 1 MSPS, Integrated Data Acquisition Subsystem

文件：1.12769 Mbytes Page：49 Pages

18-Bit, 2 MSPS, 關Module Data Acquisition Solution

文件：921.81 Kbytes Page：35 Pages