XC9572价格

参考价格:¥24.1724

型号:XC9572XL-10CS48I 品牌:Xilinx 备注:这里有XC9572多少钱,2025年最近7天走势,今日出价,今日竞价,XC9572批发/采购报价,XC9572行情走势销售排行榜,XC9572报价。
型号 功能描述 生产厂家 企业 LOGO 操作
XC9572

In-System Programmable CPLD

AMD

超威半导体

XC9572XL High Performance CPLD

Features • 5 ns pin-to-pin logic delays • System frequency up to 178 MHz • 72 macrocells with 1,600 usable gates • Available in small footprint packages - 44-pin PLCC (34 user I/O pins) - 44-pin VQFP (34 user I/O pins) - 48-pin CSP (38 user I/O pins) - 64-pin VQFP (52 user I/O pins) - 100

AMD

超威半导体

XC9572XL High Performance CPLD

Features • 5 ns pin-to-pin logic delays • System frequency up to 178 MHz • 72 macrocells with 1,600 usable gates • Available in small footprint packages - 44-pin PLCC (34 user I/O pins) - 44-pin VQFP (34 user I/O pins) - 48-pin CSP (38 user I/O pins) - 64-pin VQFP (52 user I/O pins) - 100

AMD

超威半导体

XC9572XL High Performance CPLD

Features • 5 ns pin-to-pin logic delays • System frequency up to 178 MHz • 72 macrocells with 1,600 usable gates • Available in small footprint packages - 44-pin PLCC (34 user I/O pins) - 44-pin VQFP (34 user I/O pins) - 48-pin CSP (38 user I/O pins) - 64-pin VQFP (52 user I/O pins) - 100

AMD

超威半导体

XC9572XL High Performance CPLD

Features • 5 ns pin-to-pin logic delays • System frequency up to 178 MHz • 72 macrocells with 1,600 usable gates • Available in small footprint packages - 44-pin PLCC (34 user I/O pins) - 44-pin VQFP (34 user I/O pins) - 48-pin CSP (38 user I/O pins) - 64-pin VQFP (52 user I/O pins) - 100

AMD

超威半导体

XC9572XL High Performance CPLD

Features • 5 ns pin-to-pin logic delays • System frequency up to 178 MHz • 72 macrocells with 1,600 usable gates • Available in small footprint packages - 44-pin PLCC (34 user I/O pins) - 44-pin VQFP (34 user I/O pins) - 48-pin CSP (38 user I/O pins) - 64-pin VQFP (52 user I/O pins) - 100

AMD

超威半导体

XC9572XL High Performance CPLD

Features • 5 ns pin-to-pin logic delays • System frequency up to 178 MHz • 72 macrocells with 1,600 usable gates • Available in small footprint packages - 44-pin PLCC (34 user I/O pins) - 44-pin VQFP (34 user I/O pins) - 48-pin CSP (38 user I/O pins) - 64-pin VQFP (52 user I/O pins) - 100

AMD

超威半导体

XC9572XL High Performance CPLD

Features • 5 ns pin-to-pin logic delays • System frequency up to 178 MHz • 72 macrocells with 1,600 usable gates • Available in small footprint packages - 44-pin PLCC (34 user I/O pins) - 44-pin VQFP (34 user I/O pins) - 48-pin CSP (38 user I/O pins) - 64-pin VQFP (52 user I/O pins) - 100

AMD

超威半导体

XC9572XL High Performance CPLD

Features • 5 ns pin-to-pin logic delays • System frequency up to 178 MHz • 72 macrocells with 1,600 usable gates • Available in small footprint packages - 44-pin PLCC (34 user I/O pins) - 44-pin VQFP (34 user I/O pins) - 48-pin CSP (38 user I/O pins) - 64-pin VQFP (52 user I/O pins) - 100

AMD

超威半导体

XC9572XL High Performance CPLD

Features • 5 ns pin-to-pin logic delays • System frequency up to 178 MHz • 72 macrocells with 1,600 usable gates • Available in small footprint packages - 44-pin PLCC (34 user I/O pins) - 44-pin VQFP (34 user I/O pins) - 48-pin CSP (38 user I/O pins) - 64-pin VQFP (52 user I/O pins) - 100

AMD

超威半导体

XC9572XL High Performance CPLD

Features • 5 ns pin-to-pin logic delays • System frequency up to 178 MHz • 72 macrocells with 1,600 usable gates • Available in small footprint packages - 44-pin PLCC (34 user I/O pins) - 44-pin VQFP (34 user I/O pins) - 48-pin CSP (38 user I/O pins) - 64-pin VQFP (52 user I/O pins) - 100

AMD

超威半导体

XC9572XL High Performance CPLD

Features • 5 ns pin-to-pin logic delays • System frequency up to 178 MHz • 72 macrocells with 1,600 usable gates • Available in small footprint packages - 44-pin PLCC (34 user I/O pins) - 44-pin VQFP (34 user I/O pins) - 48-pin CSP (38 user I/O pins) - 64-pin VQFP (52 user I/O pins) - 100

AMD

超威半导体

XC9572XL High Performance CPLD

Features • 5 ns pin-to-pin logic delays • System frequency up to 178 MHz • 72 macrocells with 1,600 usable gates • Available in small footprint packages - 44-pin PLCC (34 user I/O pins) - 44-pin VQFP (34 user I/O pins) - 48-pin CSP (38 user I/O pins) - 64-pin VQFP (52 user I/O pins) - 100

AMD

超威半导体

XC9572XL High Performance CPLD

Features • 5 ns pin-to-pin logic delays • System frequency up to 178 MHz • 72 macrocells with 1,600 usable gates • Available in small footprint packages - 44-pin PLCC (34 user I/O pins) - 44-pin VQFP (34 user I/O pins) - 48-pin CSP (38 user I/O pins) - 64-pin VQFP (52 user I/O pins) - 100

AMD

超威半导体

XC9572XL High Performance CPLD

Features • 5 ns pin-to-pin logic delays • System frequency up to 178 MHz • 72 macrocells with 1,600 usable gates • Available in small footprint packages - 44-pin PLCC (34 user I/O pins) - 44-pin VQFP (34 user I/O pins) - 48-pin CSP (38 user I/O pins) - 64-pin VQFP (52 user I/O pins) - 100

AMD

超威半导体

XC9572XL High Performance CPLD

Features • 5 ns pin-to-pin logic delays • System frequency up to 178 MHz • 72 macrocells with 1,600 usable gates • Available in small footprint packages - 44-pin PLCC (34 user I/O pins) - 44-pin VQFP (34 user I/O pins) - 48-pin CSP (38 user I/O pins) - 64-pin VQFP (52 user I/O pins) - 100

AMD

超威半导体

XC9572XL High Performance CPLD

Features • 5 ns pin-to-pin logic delays • System frequency up to 178 MHz • 72 macrocells with 1,600 usable gates • Available in small footprint packages - 44-pin PLCC (34 user I/O pins) - 44-pin VQFP (34 user I/O pins) - 48-pin CSP (38 user I/O pins) - 64-pin VQFP (52 user I/O pins) - 100

AMD

超威半导体

XC9572XL High Performance CPLD

Features • 5 ns pin-to-pin logic delays • System frequency up to 178 MHz • 72 macrocells with 1,600 usable gates • Available in small footprint packages - 44-pin PLCC (34 user I/O pins) - 44-pin VQFP (34 user I/O pins) - 48-pin CSP (38 user I/O pins) - 64-pin VQFP (52 user I/O pins) - 100

AMD

超威半导体

XC9572XL High Performance CPLD

Features • 5 ns pin-to-pin logic delays • System frequency up to 178 MHz • 72 macrocells with 1,600 usable gates • Available in small footprint packages - 44-pin PLCC (34 user I/O pins) - 44-pin VQFP (34 user I/O pins) - 48-pin CSP (38 user I/O pins) - 64-pin VQFP (52 user I/O pins) - 100

AMD

超威半导体

XC9572XL High Performance CPLD

Features • 5 ns pin-to-pin logic delays • System frequency up to 178 MHz • 72 macrocells with 1,600 usable gates • Available in small footprint packages - 44-pin PLCC (34 user I/O pins) - 44-pin VQFP (34 user I/O pins) - 48-pin CSP (38 user I/O pins) - 64-pin VQFP (52 user I/O pins) - 100

AMD

超威半导体

XC9572XL High Performance CPLD

Features • 5 ns pin-to-pin logic delays • System frequency up to 178 MHz • 72 macrocells with 1,600 usable gates • Available in small footprint packages - 44-pin PLCC (34 user I/O pins) - 44-pin VQFP (34 user I/O pins) - 48-pin CSP (38 user I/O pins) - 64-pin VQFP (52 user I/O pins) - 100

AMD

超威半导体

XC9572XL High Performance CPLD

Features • 5 ns pin-to-pin logic delays • System frequency up to 178 MHz • 72 macrocells with 1,600 usable gates • Available in small footprint packages - 44-pin PLCC (34 user I/O pins) - 44-pin VQFP (34 user I/O pins) - 48-pin CSP (38 user I/O pins) - 64-pin VQFP (52 user I/O pins) - 100

AMD

超威半导体

XC9572XL High Performance CPLD

Features • 5 ns pin-to-pin logic delays • System frequency up to 178 MHz • 72 macrocells with 1,600 usable gates • Available in small footprint packages - 44-pin PLCC (34 user I/O pins) - 44-pin VQFP (34 user I/O pins) - 48-pin CSP (38 user I/O pins) - 64-pin VQFP (52 user I/O pins) - 100

AMD

超威半导体

XC9572XL High Performance CPLD

Features • 5 ns pin-to-pin logic delays • System frequency up to 178 MHz • 72 macrocells with 1,600 usable gates • Available in small footprint packages - 44-pin PLCC (34 user I/O pins) - 44-pin VQFP (34 user I/O pins) - 48-pin CSP (38 user I/O pins) - 64-pin VQFP (52 user I/O pins) - 100

AMD

超威半导体

XC9572XL High Performance CPLD

Features • 5 ns pin-to-pin logic delays • System frequency up to 178 MHz • 72 macrocells with 1,600 usable gates • Available in small footprint packages - 44-pin PLCC (34 user I/O pins) - 44-pin VQFP (34 user I/O pins) - 48-pin CSP (38 user I/O pins) - 64-pin VQFP (52 user I/O pins) - 100

AMD

超威半导体

XC9572XL High Performance CPLD

Features • 5 ns pin-to-pin logic delays • System frequency up to 178 MHz • 72 macrocells with 1,600 usable gates • Available in small footprint packages - 44-pin PLCC (34 user I/O pins) - 44-pin VQFP (34 user I/O pins) - 48-pin CSP (38 user I/O pins) - 64-pin VQFP (52 user I/O pins) - 100

AMD

超威半导体

XC9572XL High Performance CPLD

Features • 5 ns pin-to-pin logic delays • System frequency up to 178 MHz • 72 macrocells with 1,600 usable gates • Available in small footprint packages - 44-pin PLCC (34 user I/O pins) - 44-pin VQFP (34 user I/O pins) - 48-pin CSP (38 user I/O pins) - 64-pin VQFP (52 user I/O pins) - 100

AMD

超威半导体

XC9572XL High Performance CPLD

Features • 5 ns pin-to-pin logic delays • System frequency up to 178 MHz • 72 macrocells with 1,600 usable gates • Available in small footprint packages - 44-pin PLCC (34 user I/O pins) - 44-pin VQFP (34 user I/O pins) - 48-pin CSP (38 user I/O pins) - 64-pin VQFP (52 user I/O pins) - 100

AMD

超威半导体

XC9572XL High Performance CPLD

Features • 5 ns pin-to-pin logic delays • System frequency up to 178 MHz • 72 macrocells with 1,600 usable gates • Available in small footprint packages - 44-pin PLCC (34 user I/O pins) - 44-pin VQFP (34 user I/O pins) - 48-pin CSP (38 user I/O pins) - 64-pin VQFP (52 user I/O pins) - 100

AMD

超威半导体

XC9572XL High Performance CPLD

Features • 5 ns pin-to-pin logic delays • System frequency up to 178 MHz • 72 macrocells with 1,600 usable gates • Available in small footprint packages - 44-pin PLCC (34 user I/O pins) - 44-pin VQFP (34 user I/O pins) - 48-pin CSP (38 user I/O pins) - 64-pin VQFP (52 user I/O pins) - 100

AMD

超威半导体

XC9572XL High Performance CPLD

Features • 5 ns pin-to-pin logic delays • System frequency up to 178 MHz • 72 macrocells with 1,600 usable gates • Available in small footprint packages - 44-pin PLCC (34 user I/O pins) - 44-pin VQFP (34 user I/O pins) - 48-pin CSP (38 user I/O pins) - 64-pin VQFP (52 user I/O pins) - 100

AMD

超威半导体

XC9572XL High Performance CPLD

Features • 5 ns pin-to-pin logic delays • System frequency up to 178 MHz • 72 macrocells with 1,600 usable gates • Available in small footprint packages - 44-pin PLCC (34 user I/O pins) - 44-pin VQFP (34 user I/O pins) - 48-pin CSP (38 user I/O pins) - 64-pin VQFP (52 user I/O pins) - 100

AMD

超威半导体

XC9572XL High Performance CPLD

Features • 5 ns pin-to-pin logic delays • System frequency up to 178 MHz • 72 macrocells with 1,600 usable gates • Available in small footprint packages - 44-pin PLCC (34 user I/O pins) - 44-pin VQFP (34 user I/O pins) - 48-pin CSP (38 user I/O pins) - 64-pin VQFP (52 user I/O pins) - 100

AMD

超威半导体

XC9572XL High Performance CPLD

Features • 5 ns pin-to-pin logic delays • System frequency up to 178 MHz • 72 macrocells with 1,600 usable gates • Available in small footprint packages - 44-pin PLCC (34 user I/O pins) - 44-pin VQFP (34 user I/O pins) - 48-pin CSP (38 user I/O pins) - 64-pin VQFP (52 user I/O pins) - 100

AMD

超威半导体

XC9572XL High Performance CPLD

Features • 5 ns pin-to-pin logic delays • System frequency up to 178 MHz • 72 macrocells with 1,600 usable gates • Available in small footprint packages - 44-pin PLCC (34 user I/O pins) - 44-pin VQFP (34 user I/O pins) - 48-pin CSP (38 user I/O pins) - 64-pin VQFP (52 user I/O pins) - 100

AMD

超威半导体

XC9572XL High Performance CPLD

Features • 5 ns pin-to-pin logic delays • System frequency up to 178 MHz • 72 macrocells with 1,600 usable gates • Available in small footprint packages - 44-pin PLCC (34 user I/O pins) - 44-pin VQFP (34 user I/O pins) - 48-pin CSP (38 user I/O pins) - 64-pin VQFP (52 user I/O pins) - 100

AMD

超威半导体

XC9572XL High Performance CPLD

Features • 5 ns pin-to-pin logic delays • System frequency up to 178 MHz • 72 macrocells with 1,600 usable gates • Available in small footprint packages - 44-pin PLCC (34 user I/O pins) - 44-pin VQFP (34 user I/O pins) - 48-pin CSP (38 user I/O pins) - 64-pin VQFP (52 user I/O pins) - 100

AMD

超威半导体

XC9572XL High Performance CPLD

Features • 5 ns pin-to-pin logic delays • System frequency up to 178 MHz • 72 macrocells with 1,600 usable gates • Available in small footprint packages - 44-pin PLCC (34 user I/O pins) - 44-pin VQFP (34 user I/O pins) - 48-pin CSP (38 user I/O pins) - 64-pin VQFP (52 user I/O pins) - 100

AMD

超威半导体

XC9572XL High Performance CPLD

Features • 5 ns pin-to-pin logic delays • System frequency up to 178 MHz • 72 macrocells with 1,600 usable gates • Available in small footprint packages - 44-pin PLCC (34 user I/O pins) - 44-pin VQFP (34 user I/O pins) - 48-pin CSP (38 user I/O pins) - 64-pin VQFP (52 user I/O pins) - 100

AMD

超威半导体

XC9572XL High Performance CPLD

Features • 5 ns pin-to-pin logic delays • System frequency up to 178 MHz • 72 macrocells with 1,600 usable gates • Available in small footprint packages - 44-pin PLCC (34 user I/O pins) - 44-pin VQFP (34 user I/O pins) - 48-pin CSP (38 user I/O pins) - 64-pin VQFP (52 user I/O pins) - 100

AMD

超威半导体

XC9572XL High Performance CPLD

Features • 5 ns pin-to-pin logic delays • System frequency up to 178 MHz • 72 macrocells with 1,600 usable gates • Available in small footprint packages - 44-pin PLCC (34 user I/O pins) - 44-pin VQFP (34 user I/O pins) - 48-pin CSP (38 user I/O pins) - 64-pin VQFP (52 user I/O pins) - 100

AMD

超威半导体

XC9572XL High Performance CPLD

Features • 5 ns pin-to-pin logic delays • System frequency up to 178 MHz • 72 macrocells with 1,600 usable gates • Available in small footprint packages - 44-pin PLCC (34 user I/O pins) - 44-pin VQFP (34 user I/O pins) - 48-pin CSP (38 user I/O pins) - 64-pin VQFP (52 user I/O pins) - 100

AMD

超威半导体

封装/外壳:44-LCC(J 形引线) 包装:托盘 描述:IC CPLD 72MC 10NS 44PLCC 集成电路(IC) CPLD(复杂可编程逻辑器件)

Xilinx

赛灵思

封装/外壳:84-LCC(J 形引线) 包装:托盘 描述:IC CPLD 72MC 10NS 84PLCC 集成电路(IC) CPLD(复杂可编程逻辑器件)

Xilinx

赛灵思

XC9572XL: 3.3V ISP CPLD Family

AMD

超威半导体

XC9572XV: 2.5V ISP CPLD Family

AMD

超威半导体

Electronic, 2 C #16 Sol BC, PVC Ins, Red PVC Jkt, FPLR

Product Description Electronic, 2 Conductor 16AWG (Solid) Bare Copper, PVC Insulation, Red PVC Outer Jacket, FPLR

BELDEN

百通

Fiber Channel/Ethernet Clock Generator IC, PLL Core, Dividers, 7 Clock Outputs

GENERAL DESCRIPTION The AD9572 provides a multioutput clock generator function along with two on-chip PLL cores, optimized for fiber channel line card applications that include an Ethernet interface. The integer-N PLL design is based on the Analog Devices, Inc., proven portfolio of high performan

AD

亚德诺

Fiber Channel/Ethernet Clock Generator IC, PLL Core, Dividers, 7 Clock Outputs

GENERAL DESCRIPTION The AD9572 provides a multioutput clock generator function along with two on-chip PLL cores, optimized for fiber channel line card applications that include an Ethernet interface. The integer-N PLL design is based on the Analog Devices, Inc., proven portfolio of high performan

AD

亚德诺

Fiber Channel/Ethernet Clock Generator IC, PLL Core, Dividers, 7 Clock Outputs

GENERAL DESCRIPTION The AD9572 provides a multioutput clock generator function along with two on-chip PLL cores, optimized for fiber channel line card applications that include an Ethernet interface. The integer-N PLL design is based on the Analog Devices, Inc., proven portfolio of high performan

AD

亚德诺

Fiber Channel/Ethernet Clock Generator IC, PLL Core, Dividers, 7 Clock Outputs

GENERAL DESCRIPTION The AD9572 provides a multioutput clock generator function along with two on-chip PLL cores, optimized for fiber channel line card applications that include an Ethernet interface. The integer-N PLL design is based on the Analog Devices, Inc., proven portfolio of high performan

AD

亚德诺

XC9572产品属性

  • 类型

    描述

  • 型号

    XC9572

  • 制造商

    XILINX

  • 制造商全称

    XILINX

  • 功能描述

    XC9572XL High Performance CPLD

更新时间:2025-11-22 23:00:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
XILINX(赛灵思)
24+
PLCC
7350
现货供应,当天可交货!免费送样,原厂技术支持!!!
XILINX(赛灵思)
24+
NA/
8735
原厂直销,现货供应,账期支持!
XILINX
2016+
QFP
3000
只做原装,假一罚十,公司可开17%增值税发票!
XILINX
23+
QFP
20000
全新原装假一赔十
XILINX
24+
QFP-100L
80000
只做自己库存 全新原装进口正品假一赔百 可开13%增
XILINX/赛灵思
25+
PLCC
54648
百分百原装现货 实单必成 欢迎询价
XILINX/赛灵思
22+
PLCC
100000
代理渠道/只做原装/可含税
XILINX
02+
QFP
50
一级代理,专注军工、汽车、医疗、工业、新能源、电力
XILINX/赛灵思
24+
TQFP
20000
全新原厂原装,进口正品现货,正规渠道可含税!!
XILINX/赛灵思
21+
QFP100
450
只做原装,质量保证

XC9572数据表相关新闻

  • XC9572XL10TQG100C

    热门搜索: 5 V CPLD - Complex Programmable Logic Devices CPLD - 复杂可编程逻辑器件 , TQFP-144 127 1.8 V CPLD - 复杂可编程逻辑器件 , QFP-64 128 CPLD - 复杂可编程逻辑器件 , TQFP-144 114 I/O 980 1.8 V CPLD - 复杂可编程逻辑器件 , 512 CPLD - 复杂可编程逻辑

    2020-11-16
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    2020-11-16
  • XC9536XL-5PC44C

    XC9536XL-5PC44C深圳宇航军工半导体有限公司优势品牌:XILINX、ALTERA、SAMSUNG 、MICRON、HYNIX、NANYA 、ISSI、INTEL、TI、MAXIM、ADI、POWER、DAVICOM、PLX、CYPRESS、MARVELL、AOS、ON、ST、NXP、IR、FREESCALE、NS、AVAGO、TOSHIBA、DIODES 、RENESAS、 ATMEL、等..优势

    2020-7-9
  • XC9572-10TQ100C

    TQFP-100 CPLD - 复杂可编程逻辑器件 , CSBGA-48 CPLD - 复杂可编程逻辑器件 , 5 V CPLD - 复杂可编程逻辑器件 , MAX V CPLD - 复杂可编程逻辑器件 , TQFP-100 5 V CPLD - 复杂可编程逻辑器件 , + 85 C CPLD - 复杂可编程逻辑器件

    2020-7-8
  • XC9572XL10TQG100C

    热门搜索: TQFP-100 CPLD - 复杂可编程逻辑器件 , ATF1508AS CPLD - 复杂可编程逻辑器件 , MAX V CPLD - 复杂可编程逻辑器件 , TQFP-100 5 V CPLD - 复杂可编程逻辑器件 , ispMACH 4000 32 CPLD - 复杂可编程逻辑器件 , MAX II CPLD - 复杂可编程逻辑器件

    2020-7-8
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    XILINX XC9536XL-10VQG64C 数据手册 PDF

    2019-1-23