DIGITAL AUDIO INTERFACE RECEIVER

DESCRIPTION The WM8803 is a digital audio interface receiver conforming to IEC 60958/61937 and EIAJ CP-1201. It supports input audio data rates up to 192kHz and a maximum output data length of 24 bits. The WM8803 has a flexible digital output port that allows the user access to channel statu

Digital Audio Interface Receiver

DIGITAL AUDIO INTERFACE RECEIVER

DESCRIPTION The WM8803 is a digital audio interface receiver conforming to IEC 60958/61937 and EIAJ CP-1201. It supports input audio data rates up to 192kHz and a maximum output data length of 24 bits. The WM8803 has a flexible digital output port that allows the user access to channel statu

DIGITAL AUDIO INTERFACE RECEIVER

DESCRIPTION The WM8803 is a digital audio interface receiver conforming to IEC 60958/61937 and EIAJ CP-1201. It supports input audio data rates up to 192kHz and a maximum output data length of 24 bits. The WM8803 has a flexible digital output port that allows the user access to channel statu

DIGITAL AUDIO INTERFACE RECEIVER

DESCRIPTION The WM8803 is a digital audio interface receiver conforming to IEC 60958/61937 and EIAJ CP-1201. It supports input audio data rates up to 192kHz and a maximum output data length of 24 bits. The WM8803 has a flexible digital output port that allows the user access to channel statu

Octal 8-Bit TrimDAC with Power Shutdown

GENERAL DESCRIPTION The AD8801/AD8803 provides eight digitally controlled dc voltage outputs. This potentiometer divider TrimDAC® allows replacement of the mechanical trimmer function in new designs. The AD8801/AD8803 is ideal for dc voltage adjustment applications. FEATURES Low Cost

Octal 8-Bit TrimDAC with Power Shutdown

GENERAL DESCRIPTION The AD8801/AD8803 provides eight digitally controlled dc voltage outputs. This potentiometer divider TrimDAC® allows replacement of the mechanical trimmer function in new designs. The AD8801/AD8803 is ideal for dc voltage adjustment applications. FEATURES Low Cost

LIGHT EMITTING DIODE DRIVER

DESCRIPTION The block Diagram of the SA8803 is shown in Fig. 1. A control word is clocked into the device via the DATA pin with a local clock provided to pin CLK. The control word comprises a 3-bit chip address, a 5-bit LED address and a Status (on/off) bit. Provided that the Chip Adress matches

10/15 CH PLL

文件：109.97 Kbytes Page：9 Pages

10/15 CH PLL

文件：109.97 Kbytes Page：9 Pages