| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
UR5596_14 | DDR TERMINATION REGULATOR DESCRIPTION The UTC UR5596 is a linear bus termination regulator and designed to meet JEDEC SSTL-2(Stub-Series Terminated Logic) specifications for termination of DDR-SDRAM. It also can be used in SSTL-3 or HSTL (High-Speed Transceiver Logic) scheme. The device contains a high-speed OP AMP to pro | UTC 友顺 |   |
更新时间：2026-2-2 9:29:00
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
UTC/友顺 |
23+ |
SOP-8TR |
11200 |
原厂授权一级代理、全球订货优势渠道、可提供一站式BO |
|||
UTC/友顺 |
2450+ |
SOP-8 |
8850 |
只做原装正品假一赔十为客户做到零风险!! |
|||
UTC |
24+ |
SOP8管装 |
6000 |
深圳原装现货价格优势 |
|||
USAR |
20+ |
QFP |
500 |
样品可出,优势库存欢迎实单 |
|||
UTC/友顺 |
25+ |
NA |
880000 |
明嘉莱只做原装正品现货 |
|||
25+ |
QFP |
1278 |
普通 |
||||
UTC/友顺 |
2407+ |
SOP-8 |
7750 |
原装现货!实单直说!特价! |
|||
UTC/友顺 |
25+ |
SOP-8 |
10000 |
全新原装现货库存 |
|||
ST |
23+ |
DIP2 |
16900 |
正规渠道,只有原装! |
|||
UTC |
23+ |
SOP8 |
50000 |
全新原装正品现货,支持订货 |
UR5596_14规格书下载地址
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DdatasheetPDF页码索引
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