Flash Programmable System Devices with 8032 Microcontroller Core and 256Kbit SRAM

SUMMARY DESCRIPTION ■ Dual bank Flash memories – Concurrent operation, read from memory while erasing and writing the other. In-Application Programming (IAP) for remote updates – Large 128KByte or 256KByte main Flash memory for application code, operating sys tems, or bit maps for graphic

Flash Programmable System Devices with 8032 Microcontroller Core and 256Kbit SRAM

SUMMARY DESCRIPTION ■ Dual bank Flash memories – Concurrent operation, read from memory while erasing and writing the other. In-Application Programming (IAP) for remote updates – Large 128KByte or 256KByte main Flash memory for application code, operating sys tems, or bit maps for graphic

Flash Programmable System Device with 8032 Microcontroller Core

FEATURES SUMMARY ■ The µPSD3200 Family combines a Flash PSD architecture with an 8032 microcontroller core The µPSD3200 Family of Flash PSDs features dual banks of Flash memory, SRAM, general purpose I/O and programmable logic, supervisory functions and access via USB, I2C, AD

Flash Programmable System Device with 8032 Microcontroller Core

FEATURES SUMMARY ■ The µPSD3200 Family combines a Flash PSD architecture with an 8032 microcontroller core The µPSD3200 Family of Flash PSDs features dual banks of Flash memory, SRAM, general purpose I/O and programmable logic, supervisory functions and access via USB, I2C, AD

Flash Programmable System Devices with 8032 Microcontroller Core

FEATURES SUMMARY ■ The µPSD3200 Family combines a Flash PSD architecture with an 8032 microcontroller core The µPSD3200 Family of Flash PSDs features dual banks of Flash memory, SRAM, general purpose I/O and programmable logic, supervisory functions and access via USB, I2C, AD

Flash Programmable System Devices with 8032 Microcontroller Core and 256Kbit SRAM

SUMMARY DESCRIPTION ■ Dual bank Flash memories – Concurrent operation, read from memory while erasing and writing the other. In-Application Programming (IAP) for remote updates – Large 128KByte or 256KByte main Flash memory for application code, operating sys tems, or bit maps for graphic

Flash Programmable System Devices with 8032 Microcontroller Core and 256Kbit SRAM

SUMMARY DESCRIPTION ■ Dual bank Flash memories – Concurrent operation, read from memory while erasing and writing the other. In-Application Programming (IAP) for remote updates – Large 128KByte or 256KByte main Flash memory for application code, operating sys tems, or bit maps for graphic

Flash Programmable System Device with 8032 Microcontroller Core

FEATURES SUMMARY ■ The µPSD3200 Family combines a Flash PSD architecture with an 8032 microcontroller core The µPSD3200 Family of Flash PSDs features dual banks of Flash memory, SRAM, general purpose I/O and programmable logic, supervisory functions and access via USB, I2C, AD

Flash Programmable System Devices with 8032 Microcontroller Core and 256Kbit SRAM

SUMMARY DESCRIPTION ■ Dual bank Flash memories – Concurrent operation, read from memory while erasing and writing the other. In-Application Programming (IAP) for remote updates – Large 128KByte or 256KByte main Flash memory for application code, operating sys tems, or bit maps for graphic

Flash Programmable System Device with 8032 Microcontroller Core

FEATURES SUMMARY ■ The µPSD3200 Family combines a Flash PSD architecture with an 8032 microcontroller core The µPSD3200 Family of Flash PSDs features dual banks of Flash memory, SRAM, general purpose I/O and programmable logic, supervisory functions and access via USB, I2C, AD

Flash Programmable System Devices with 8032 Microcontroller Core

FEATURES SUMMARY ■ The µPSD3200 Family combines a Flash PSD architecture with an 8032 microcontroller core The µPSD3200 Family of Flash PSDs features dual banks of Flash memory, SRAM, general purpose I/O and programmable logic, supervisory functions and access via USB, I2C, AD

Flash Programmable System Devices with 8032 Microcontroller Core and 256Kbit SRAM

SUMMARY DESCRIPTION ■ Dual bank Flash memories – Concurrent operation, read from memory while erasing and writing the other. In-Application Programming (IAP) for remote updates – Large 128KByte or 256KByte main Flash memory for application code, operating sys tems, or bit maps for graphic

Flash Programmable System Devices with 8032 Microcontroller Core and 256Kbit SRAM

SUMMARY DESCRIPTION ■ Dual bank Flash memories – Concurrent operation, read from memory while erasing and writing the other. In-Application Programming (IAP) for remote updates – Large 128KByte or 256KByte main Flash memory for application code, operating sys tems, or bit maps for graphic

Flash Programmable System Devices with 8032 Microcontroller Core and 256Kbit SRAM

SUMMARY DESCRIPTION ■ Dual bank Flash memories – Concurrent operation, read from memory while erasing and writing the other. In-Application Programming (IAP) for remote updates – Large 128KByte or 256KByte main Flash memory for application code, operating sys tems, or bit maps for graphic

Flash Programmable System Device with 8032 Microcontroller Core

FEATURES SUMMARY ■ The µPSD3200 Family combines a Flash PSD architecture with an 8032 microcontroller core The µPSD3200 Family of Flash PSDs features dual banks of Flash memory, SRAM, general purpose I/O and programmable logic, supervisory functions and access via USB, I2C, AD

Flash Programmable System Device with 8032 Microcontroller Core

FEATURES SUMMARY ■ The µPSD3200 Family combines a Flash PSD architecture with an 8032 microcontroller core The µPSD3200 Family of Flash PSDs features dual banks of Flash memory, SRAM, general purpose I/O and programmable logic, supervisory functions and access via USB, I2C, AD

Flash Programmable System Devices with 8032 Microcontroller Core

FEATURES SUMMARY ■ The µPSD3200 Family combines a Flash PSD architecture with an 8032 microcontroller core The µPSD3200 Family of Flash PSDs features dual banks of Flash memory, SRAM, general purpose I/O and programmable logic, supervisory functions and access via USB, I2C, AD

Flash Programmable System Devices with 8032 Microcontroller Core and 256Kbit SRAM

SUMMARY DESCRIPTION ■ Dual bank Flash memories – Concurrent operation, read from memory while erasing and writing the other. In-Application Programming (IAP) for remote updates – Large 128KByte or 256KByte main Flash memory for application code, operating sys tems, or bit maps for graphic

Flash Programmable System Devices with 8032 Microcontroller Core and 256Kbit SRAM

SUMMARY DESCRIPTION ■ Dual bank Flash memories – Concurrent operation, read from memory while erasing and writing the other. In-Application Programming (IAP) for remote updates – Large 128KByte or 256KByte main Flash memory for application code, operating sys tems, or bit maps for graphic

8032 MCU with USB and Programmable Logic

FEATURES SUMMARY ■ The µPSD3200 Family combines a Flash PSD architecture with an 8032 microcontroller core The µPSD3200 Family of Flash PSDs features dual banks of Flash memory, SRAM, general purpose I/O and programmable logic, supervisory functions and access via USB, I2C, AD

Flash Programmable System Devices with 8032 Microcontroller Core and 256Kbit SRAM

SUMMARY DESCRIPTION ■ Dual bank Flash memories – Concurrent operation, read from memory while erasing and writing the other. In-Application Programming (IAP) for remote updates – Large 128KByte or 256KByte main Flash memory for application code, operating sys tems, or bit maps for graphic

Flash Programmable System Device with 8032 Microcontroller Core

FEATURES SUMMARY ■ The µPSD3200 Family combines a Flash PSD architecture with an 8032 microcontroller core The µPSD3200 Family of Flash PSDs features dual banks of Flash memory, SRAM, general purpose I/O and programmable logic, supervisory functions and access via USB, I2C, AD

Flash Programmable System Devices with 8032 Microcontroller Core

FEATURES SUMMARY ■ The µPSD3200 Family combines a Flash PSD architecture with an 8032 microcontroller core The µPSD3200 Family of Flash PSDs features dual banks of Flash memory, SRAM, general purpose I/O and programmable logic, supervisory functions and access via USB, I2C, AD

Flash Programmable System Devices with 8032 Microcontroller Core and 256Kbit SRAM

SUMMARY DESCRIPTION ■ Dual bank Flash memories – Concurrent operation, read from memory while erasing and writing the other. In-Application Programming (IAP) for remote updates – Large 128KByte or 256KByte main Flash memory for application code, operating sys tems, or bit maps for graphic

Flash Programmable System Devices with 8032 Microcontroller Core and 256Kbit SRAM

SUMMARY DESCRIPTION ■ Dual bank Flash memories – Concurrent operation, read from memory while erasing and writing the other. In-Application Programming (IAP) for remote updates – Large 128KByte or 256KByte main Flash memory for application code, operating sys tems, or bit maps for graphic

Flash Programmable System Device with 8032 Microcontroller Core

FEATURES SUMMARY ■ The µPSD3200 Family combines a Flash PSD architecture with an 8032 microcontroller core The µPSD3200 Family of Flash PSDs features dual banks of Flash memory, SRAM, general purpose I/O and programmable logic, supervisory functions and access via USB, I2C, AD

封装/外壳：80-LQFP 包装：卷带（TR） 描述：IC MCU 8BIT 288KB FLASH 80LQFP 集成电路（IC） 微控制器