| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
U74LCX74 | LOW VOLTAGE DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP WITH 5V TOLERANT INPUTS 文件：175.58 Kbytes Page：7 Pages | UTC 友顺 |   | |
U74LCX74 | LOWVOLTAGE DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP WITH 5V TOLERANT INPUTS | UTC 友顺 | | |
LOW VOLTAGE DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLO 文件：189.37 Kbytes Page：7 Pages | UTC 友顺 | | ||
LOW VOLTAGE DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP WITH 5V TOLERANT INPUTS 文件：175.58 Kbytes Page：7 Pages | UTC 友顺 | | ||
LOW VOLTAGE DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLO 文件：189.37 Kbytes Page：7 Pages | UTC 友顺 | | ||
LOW VOLTAGE DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP WITH 5V TOLERANT INPUTS 文件：175.58 Kbytes Page：7 Pages | UTC 友顺 | | ||
LOW VOLTAGE DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP WITH 5V TOLERANT INPUTS 文件：175.58 Kbytes Page：7 Pages | UTC 友顺 | | ||
LOW VOLTAGE DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP WITH 5V TOLERANT INPUTS 文件：175.58 Kbytes Page：7 Pages | UTC 友顺 | | ||
Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs General Description The LCX74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. After the Clock Pulse input threshold voltage has been passed, the Da | Fairchild 仙童半导体 | | ||
LOW VOLTAGE CMOS DUAL D-TYPE FLIP FLOP WITH 5V TOLERANT INPUTS DESCRIPTION The 74LCX74 is a low voltage CMOS DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR NON INVERTING fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power and high speed 3.3V applications; it can be interfaced to 5V signal environment | STMICROELECTRONICS 意法半导体 | | ||
Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs General Description The LCX74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. After the Clock Pulse input threshold voltage has been passed, the Da | Fairchild 仙童半导体 | | ||
Low voltage CMOS dual D-Type Flip Flop with 5V tolerant inputs 文件：433.03 Kbytes Page：17 Pages | STMICROELECTRONICS 意法半导体 | | ||
Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs 文件：682.58 Kbytes Page：13 Pages | ONSEMI 安森美半导体 | |
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
UTC/友顺 |
24+ |
NA/ |
5642 |
原厂直销,现货供应,账期支持! |
|||
UTC(友顺) |
24+ |
TSSOP14 |
7350 |
现货供应,当天可交货!免费送样,原厂技术支持!!! |
|||
UTC/友顺 |
20+ |
TSSOP-14 |
67500 |
原装优势主营型号-可开原型号增税票 |
|||
UTC |
2450+ |
TSSOP-14T/R |
9850 |
只做原装正品现货或订货假一赔十! |
|||
UTC/友顺 |
2023+ |
TSSOP-14 |
2392 |
专注全新正品,优势现货供应 |
|||
UTC/友顺 |
21+ |
SOP-14 |
6856 |
百域芯优势 实单必成 可开13点增值税 |
|||
UTC/友顺 |
25+ |
SOP |
880000 |
明嘉莱只做原装正品现货 |
|||
UTC |
25+ |
TSSOP-16 T/R |
20000 |
原装正品价格优惠,志同道合共谋发展 |
|||
UTC |
25+ |
TSSOP-14 |
15000 |
原厂原装,价格优势 |
|||
UTC |
24+ |
TSSOP-14 T/R |
3000 |
只做原装正品现货欢迎来电查询15919825718 |
U74LCX74规格书下载地址
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DdatasheetPDF页码索引
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