8-BIT SHIFT REGISTERS WITH LATCHED 3-STATE OUTPUT REGISTERS

文件：196.49 Kbytes Page：6 Pages

8-BIT SHIFT REGISTERS WITH LATCHED 3-STATE OUTPUT REGISTERS

8-BIT SHIFT REGISTERS

文件：196.49 Kbytes Page：6 Pages

HC HCT Family

8-BIT SHIFT REGISTERS WITH LATCHED 3-STATE OUTPUT REGISTERS

文件：196.49 Kbytes Page：6 Pages

8-BIT SHIFT REGISTERS

文件：196.49 Kbytes Page：6 Pages

8-BIT SHIFT REGISTERS WITH LATCHED 3-STATE OUTPUT REGISTERS

文件：196.49 Kbytes Page：6 Pages

8-BIT SHIFT REGISTERS

文件：196.49 Kbytes Page：6 Pages

8-BIT SHIFT REGISTERS WITH LATCHED 3-STATE OUTPUT REGISTERS

文件：196.49 Kbytes Page：6 Pages

8-BIT SHIFT REGISTERS

文件：196.49 Kbytes Page：6 Pages

8-BIT SHIFT REGISTERS WITH LATCHED 3-STATE OUTPUT REGISTERS

文件：196.49 Kbytes Page：6 Pages

8-BIT SHIFT REGISTERS

文件：196.49 Kbytes Page：6 Pages

8-bit serial-in/serial or parallel-out shift register with output latches; 3-state

DESCRIPTION The 74HC/HCT595 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT595 is an 8-stage serial shift register with a storage register and 3-state outputs. The shift regi

8-bit serial-in, serial or parallel-out shift register with output latches; 3-state

1. General description The 74HC595-Q100; 74HCT595-Q100 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (DS) and a serial output (Q7S) to enable c

8-BIT SHIFT REGISTER WITH 8-BIT OUTPUT REGISTER

Description The 74HCT595 is an high speed CMOS device that is designed to be pin compatable with 74LS low power Schottky types. Features • Supply Voltage Range from 4.5V to 5.5V • Sinks or sources 8mA at VCC = 4.5V • CMOS low power consumption • Schmitt Trigger Action at All Inputs • Inputs

8-bit serial-in, serial or parallel-out shift register with output latches; 3-state

8-bit serial-in, serial or parallel-out shift register with output latches; 3-state