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TC7MPN3125FK中文资料

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TC7MPN3125FK

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21

功能描述

CMOS Digital Integrated Circuits Silicon Monolithic

数据手册

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生产厂商

TOSHIBA

TC7MPN3125FK数据手册规格书PDF详情

1. Functional Description

• Low-Voltage, Low-Power 2-Bit × 2 Dual-Supply Bus Transceiver

2. General

The TC7MPN3125FK is an advanced high-speed CMOS 4-bit dual supply voltage interface bus transceiver

fabricated with silicon gate CMOS technology.

All inputs and outputs have tolerant function, and can be applied up to 3.6 V at power down mode.

The input consists of two same 2-bit configuration and it can be used as dual 2-bit configurations or single 4-bit

configuration.

When the DIR input that changes transmission direction is H level, A-bus works as input and B-bus works as

output, and when the DIR is L level, A-bus works as output and B-bus works as input.

When the Enable input OE is H level, both A-bus and B-bus become to floating state (high-impedance).

All inputs are equipped with protection circuits against static discharge or transient excess voltage.

3. Features (Note)

(1) Operating voltage: 1.2 V and 1.8 V / 1.2 V and 2.5 V / 1.2 V and 3.3 V / 1.5 V and 2.5 V

1.5 V and 3.3 V / 1.8 V and 2.5 V / 1.8 V and 3.3 V / 2.5 V and 3.3 V

bidirectional interface

(2) High-speed operation: tpd = 13.7 ns (max) (VCCA = 2.5 ± 0.2 V, VCCB = 3.3 ± 0.3 V)

tpd = 14.8 ns (max) (VCCA = 1.8 ± 0.15 V, VCCB = 3.3 ± 0.3 V)

tpd = 16.0 ns (max) (VCCA = 1.5 ± 0.1 V, VCCB = 3.3 ± 0.3 V)

tpd = 61 ns (max) (VCCA = 1.2 ± 0.1 V, VCCB = 3.3 ± 0.3 V)

tpd = 18.5 ns (max) (VCCA = 1.8 ± 0.15 V, VCCB = 2.5 ± 0.2 V)

tpd = 19.7 ns (max) (VCCA = 1.5 ± 0.1 V, VCCB = 2.5 ± 0.2 V)

tpd = 60 ns (max) (VCCA = 1.2 ± 0.1 V, VCCB = 2.5 ± 0.2 V)

tpd = 58 ns (max) (VCCA = 1.2 ± 0.1 V, VCCB = 1.8 ± 0.15 V)

(3) Output current: |IOHB|/IOLB = 3 mA (min) (VCCB = 3.0 V)

|IOHB|/IOLB = 2 mA (min) (VCCB = 2.3 V)

|IOHB|/IOLB = 0.5 mA (min) (VCCB = 1.65 V)

|IOHA|/IOLA = 9 mA (min) (VCCA = 2.3 V)

|IOHA|/IOLA = 3 mA (min) (VCCA = 1.65 V)

|IOHA|/IOLA = 1 mA (min) (VCCA = 1.4 V)

(4) Ultra-small package: VSSOP (US16)

(5) Low power dissipation: By using the new circuit, the power consumption is reduced

significantly when OE = H.

Suitable for battery-driven applications such as PDAs and cellular phones.

(6) Floating of A-bus and B-bus is permitted (when OE = H).

(7) 3.6 V tolerance and power-down protection are provided to all inputs and outputs.

更新时间:2025-11-24 15:44:00
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