Functional Description

• Octal D-Type Latch with 3-State Outputs

General

The 74VHC573FT is an advanced high speed CMOS OCTAL LATCH with 3-STATE OUTPUT fabricated with

silicon gate C2MOS technology.

It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS

low power dissipation.

This 8-bit D-type latch is controlled by a latch enable input (LE) and an output enable input (OE).

When the OE input is high, the eight outputs are in a high impedance state.

An input protection circuit ensures that 0 to 5.5 V can be applied to the input pins without regard to the supply

voltage. This device can be used to interface 5 V to 3 V systems and two supply systems such as battery back up.

This circuit prevents device destruction due to mismatched supply and input voltages.

Features

(1) AEC-Q100 (Rev. H) (Note 1)

(2) Wide operating temperature range: Topr = -40 to 125 

(3) High speed: tpd = 4.5 ns (typ.) at VCC = 5.0 V

(4) Low power dissipation: ICC = 4.0 μA (max) at Ta = 25

(5) High noise immunity: VNIH = VNIL = 28 VCC (min)

(6) Power-down protection is provided on all inputs.

(7) Balanced propagation delays: tPLH ≈ tPHL

(8) Wide operating voltage range: VCC(opr) = 2.0 V to 5.5 V

(9) Low noise: VOLP = 1.0 V (max)

(10) Pin and function compatible with the 74 series

(74AC/HC/AHC/LV etc.) 573 type.