Functional Description

• 8-Bit Shift Register (P-IN, S-OUT)

General

The 74HC166D is a high speed CMOS 8-BIT PARALLEL/SERIAL-IN, SERIAL-OUT SHIFT REGISTER

fabricated with silicon gate C2MOS technology.

It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power

dissipation.

It consists of parallel-in or serial-in, serial-out 8-bit shift register with a gated clock input and an overriding

clear input. The parallel-in or serial-in modes are controlled by the SHIFT/LOAD input. When the SHIFT/LOAD

input is held high, the serial data input is enabled and the eight flip-flops perform serial shifting on each clock

pulse. When held low, the parallel data inputs are enabled and synchronous loading occurs on the next clock

pulse. Clocking is accomplished on the low-to-high transition of the clock pulse. The CK-INH input should be

shifted high only while the CK input is held high. A direct clear input overrides all other inputs, including the

clock, and sets all the flip-flops to zero. Functional details are shown in the truth table and the timing charts.

All inputs are equipped with protection circuits against static discharge or transient excess voltage.

Features

(1) High speed: fMAX = 57 MHz (typ.) at VCC = 5 V

(2) Low power dissipation: ICC = 4.0 μA (max) at Ta = 25 

(3) Balanced propagation delays: tPLH ≈ tPHL

(4) Wide operating voltage range: VCC(opr) = 2.0 V to 6.0 V