1 Features

• AEC-Q100 qualified for automotive applications

• Will be available in wettable flank QFN (RUC)

package

• Supports DC ground shifts up to 40V

• AC Noise Rejection of 80VPP up to 5MHz

• CMTI of 1kV/μs

• Low Prop Delay (<5ns) and Ch-Ch Skew (0.35ns)

• Greater than 250Mbps

• Low power consumption (0.65mA per channel at

1Mbps, 1.8V)

• Fully configurable dual-rail design allows each port

to operate from 1.71V to 5.5V

• 4, 2, 1 channel devices with multiple configurations

will be available

• Two device variants:

– TXG4041-Q1: 3 forward, 1 reverse

– TXG4042-Q1: 2 forward, 2 reverse

• Supports VCC disconnect feature (I/Os are forced

into high-Z)

• Schmitt-trigger inputs allows for slow and noisy

signals

• Inputs with integrated static pull-down resistors

prevent channels from floating

• Operating temperature from –40°C to +125°C

• Latch-up performance exceeds 100mA per JESD

78, class II

• ESD protection exceeds JESD 22

– 4000V human-body model

– 500V charged-device model

• Package options provided:

– RUC (X2QFN-14)

– DYY (SOT-14)

– DBQ (QSOP-16)

2 Applications

• Electric Power Steering

• Vehicle Control Unit

• Automotive Display

• Head Unit and Digital Cockpit

3 Description

The TXG404x-Q1 is a 4-bit, fixed direction, nongalvanic

based voltage and ground-level translator

that can support both logic-level shifting between

1.71V to 5.5V and ground-level shifting up to

±40V. Compared to traditional level shifters, the

TXG404x-Q1 family can solve the challenges of

voltage translation across different ground levels. The

Simplified Diagram shows a common use case where

DC shift occurs between GNDA to GNDB due to

parasitic resistance or capacitance.

VCCA is referenced to GNDA and VCCB is referenced

to GNDB. Ax pins are referenced to VCCA logic

level while Bx pins are referenced to VCCB logic

levels. Both A port and B port can accept voltages

from 1.71V to 5.5V. This device includes two enable

pins that can place the respective outputs in a highimpedance

state when the OE pin is connected to

GND or left floating. In the event of input power or

signal loss, the output is default low when OE is High

(refer to Table 7-1). The leakage between GNDA and

GNDB is <30nA when VCC to GND is shorted.

The TXG404x-Q1 device helps improve noise

immunity and power sequencing across different

ground domains while providing low power

consumption, latency and channel-to-channel skew. It

can supress noise levels of 80VPP up to 5MHz (Figure

7-4). This device can support multiple interfaces such

as SPI, UART, GPIO, and I2S.