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TS5N412PW.A中文资料

厂家型号

TS5N412PW.A

文件大小

716.1Kbytes

页面数量

22

功能描述

4-BIT 1-OF-2 FET MULTIPLEXER/DEMULTIPLEXER HIGH-BANDWIDTH BUS SWITCH

数据手册

下载地址一下载地址二到原厂下载

生产厂商

TI2

TS5N412PW.A数据手册规格书PDF详情

FEATURES

· Low and Flat ON-State Resistance (ron)

Characteristics Over Operating Range

(ron = 3 W Typ)

· 0- to 10-V Switching on Data I/O Ports

· Bidirectional Data Flow With Near-Zero

Propagation Delay

· Low Input/Output Capacitance Minimizes

Loading and Signal Distortion

(Cio(OFF) = 20 pF Max, B Port)

· VCC Operating Range From 4.75 V to 5.25 V

· Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

· ESD Performance Tested Per JESD 22

– 2000-V Human-Body Model

(A114-B, Class II)

– 1000-V Charged-Device Model (C101)

· Supports Both Digital and Analog

Applications

APPLICATIONS

· PCI Interface

· Differential Signal Interface

· Memory Interleaving

· Bus Isolation

· Low-Distortion Signal Gating

DESCRIPTION/ORDERING INFORMATION

The TS5N412 is a high-bandwidth FET bus switch utilizing a charge pump to elevate the gate voltage of the pass

transistor, providing a low and flat ON-state resistance (ron). The low and flat ON-state resistance allows for

minimal propagation delay and supports rail-to-rail switching on the data input/output (I/O) ports. The device also

features low data I/O capacitance to minimize capacitive loading and signal distortion on the data bus.

Specifically designed to support high-bandwidth applications, the TS5N412 provides an optimized interface

solution ideally suited for broadband communications, networking, and data-intensive computing systems.

The TS5N412 is a 4-bit 1-of-2 multiplexer/demultiplexer with a single output-enable (OE) input. The select (S)

inputs control the data path of the multiplexer/demultiplexer. When OE is low, the multiplexer/demultiplexer is

enabled and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE is

high, the multiplexer/demultiplexer is disabled and a high-impedance state exists between the A and B ports.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry prevents damaging

current backflow through the device when it is powered down. The device has isolation during power off.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

更新时间:2025-10-19 15:14:00
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