Programmable Baud Rate Generator Allows

Division of Any Input Reference Clock by 1

to (216 −1) and Generates an Internal 16×

Clock

Full Double Buffering Eliminates the Need

for Precise Synchronization

Standard Asynchronous Communication

Bits (Start, Stop, and Parity) Added or

Deleted to or From the Serial Data Stream

Independent Receiver Clock Input

Transmit, Receive, Line Status, and Data

Set Interrupts Independently Controlled

Fully Programmable Serial Interface

Characteristics:

− 5-, 6 -, 7-, or 8-Bit Characters

− Even-, Odd-, or No-Parity Bit Generation

and Detection

− 1-, 1 1/2-, or 2-Stop Bit Generation

− Baud Generation (dc to 256 Kbit/s)

False Start Bit Detection

Complete Status Reporting Capabilities

3-State TTL Drive Capabilities for

Bidirectional Data Bus and Control Bus

Line Break Generation and Detection

Internal Diagnostic Capabilities:

− Loopback Controls for Communications

Link Fault Isolation

− Break, Parity, Overrun, Framing Error

Simulation

Fully Prioritized Interrupt System Controls

Modem Control Functions (CTS, RTS, DSR,

DTR, RI, and DCD)

Easily Interfaces to Most Popular

Microprocessors

Faster Plug-In Replacement for National

Semiconductor NS16C450

description

The TL16C450 is a CMOS version of an asynchronous communications element (ACE). It typically functions

in a microcomputer system as a serial input/output interface.

The TL16C450 performs serial-to-parallel conversion on data received from a peripheral device or modem and

parallel-to-serial conversion on data received from its CPU. The CPU can read and report on the status of the

ACE at any point in the ACE’s operation. Reported status information includes the type of transfer operation

in progress, the status of the operation, and any error conditions encountered.

The TL16C450 ACE includes a programmable, on-board, baud rate generator. This generator is capable of

dividing a reference clock input by divisors from 1 to (216 −1) and producing a 16× clock for driving the internal

transmitter logic. Provisions are included to use this 16× clock to drive the receiver logic. Also included in the

ACE is a complete modem control capability and a processor interrupt system that may be software tailored

to the user’s requirements to minimize the computing required to handle the communications link.