1 Features

• Designed to be used in voltage-limiting

applications

• 3.5-ω on-state connection between

ports A and B

• Flow-through pinout for ease of printed circuit

board trace routing

• Direct interface with GTL+ levels

• Latch-up performance exceeds 100 mA

per JESD 78, class II

• ESD protection exceeds JESD 22:

– 2000-V Human-Body Model

– 200-V Machine Model

– 1000-V Charged-Device Model

2 Applications

• Voltage level translation

• Signal switching

• Bus isolation

3 Description

The SN74TVC3306 device provides three parallel

NMOS pass transistors with a common unbuffered

gate. The low on-state resistance of the switch allows

connections to be made with minimal propagation

delay.

The device can be used as a dual switch, with the

gates cascaded together to a reference transistor. The

low-voltage side of each pass transistor is limited to

a voltage set by the reference transistor. This is done

to protect components with inputs that are sensitive to

high-state voltage-level overshoots.