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SN74LVTH16952DLR中文资料
SN74LVTH16952DLR数据手册规格书PDF详情
Members of the Texas Instruments
WidebusE Family
State-of-the-Art Advanced BiCMOS
Technology (ABT) Design for 3.3-V
Operation and Low Static-Power
Dissipation
Support Mixed-Mode Signal Operation (5-V
Input and Output Voltages With 3.3-V VCC)
Support Unregulated Battery Operation
Down to 2.7 V
Typical VOLP (Output Ground Bounce)
<0.8 V at VCC = 3.3 V, TA = 25°C
Ioff and Power-Up 3-State Support Hot
Insertion
Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
Distributed VCC and GND Pins Minimize
High-Speed Switching Noise
Flow-Through Architecture Optimizes PCB
Layout
Latch-Up Performance Exceeds 500 mA Per
JESD 17
ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
Package Options Include Plastic Shrink
Small-Outline (DL) and Thin Shrink
Small-Outline (DGG) Packages and 380-mil
Fine-Pitch Ceramic Flat (WD) Package
description
The ’LVTH16952 devices are 16-bit registered transceivers designed for low-voltage (3.3-V) VCC operation, but
with the capability to provide a TTL interface to a 5-V system environment.
These devices can be used as two 8-bit transceivers or one 16-bit transceiver. Data on the A or B bus is stored
in the registers on the low-to-high transition of the clock (CLKAB or CLKBA) input, provided that the clock-enable
(CLKENAB or CLKENBA) input is low. Taking the output-enable (OEAB or OEBA) input low accesses the data
on either port.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
When VCC is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 1.5 V, OE should be tied to VCC through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the driver.
These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry
disables the outputs, preventing damaging current backflow through the devices when they are powered down.
The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,
which prevents driver conflict.
The SN54LVTH16952 is characterized for operation over the full military temperature range of –55°C to 125°C.
The SN74LVTH16952 is characterized for operation from –40°C to 85°C.
SN74LVTH16952DLR产品属性
- 类型
描述
- 型号
SN74LVTH16952DLR
- 功能描述
总线收发器 3.3 V ABT 16-Bit Reg Trncvr W/3-St Otpt
- RoHS
否
- 制造商
Fairchild Semiconductor
- 逻辑类型
CMOS
- 逻辑系列
74VCX
- 每芯片的通道数量
16
- 输入电平
CMOS
- 输出电平
CMOS
- 输出类型
3-State
- 高电平输出电流
- 24 mA
- 低电平输出电流
24 mA
- 传播延迟时间
6.2 ns
- 电源电压-最大
2.7 V, 3.6 V
- 电源电压-最小
1.65 V, 2.3 V
- 最大工作温度
+ 85 C
- 封装/箱体
TSSOP-48
- 封装
Reel
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
TI(德州仪器) |
24+ |
SSOP56 |
1612 |
只做原装,提供一站式配单服务,代工代料。BOM配单 |
|||
TI |
24+ |
5000 |
自己现货 |
||||
TI |
23+ |
SSOP56 |
8650 |
受权代理!全新原装现货特价热卖! |
|||
TexasInstruments |
18+ |
ICREGISTEREDTRANSCVR56SS |
6800 |
公司原装现货/欢迎来电咨询! |
|||
Texas Instruments |
24+ |
56-SSOP |
65200 |
一级代理/放心采购 |
|||
TI |
25+ |
SSOP-56 |
3854 |
就找我吧!--邀您体验愉快问购元件! |
|||
TI(德州仪器) |
2021+ |
SSOP-56 |
499 |
||||
TI |
21+ |
SSOP56 |
10000 |
原装,品质保证,请来电咨询 |
|||
TI/德州仪器 |
23+ |
SSOP56 |
50000 |
全新原装正品现货,支持订货 |
|||
TI |
24+ |
SSOP56 |
30000 |
原装正品公司现货,假一赔十! |
SN74LVTH16952DLR 价格
参考价格:¥12.1998
SN74LVTH16952DLR 资料下载更多...
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- TPS75718KTTR
- TPS75718KTTR.A
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