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SN74LVCH16952ADL.B中文资料

厂家型号

SN74LVCH16952ADL.B

文件大小

736.11Kbytes

页面数量

21

功能描述

16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS

数据手册

下载地址一下载地址二到原厂下载

生产厂商

TI2

SN74LVCH16952ADL.B数据手册规格书PDF详情

FEATURES

· Member of the Texas Instruments Widebus™

Family

· Operates From 1.65 V to 3.6 V

· Inputs Accept Voltages to 5.5 V

· Max tpd of 6.6 ns at 3.3 V

· Typical VOLP (Output Ground Bounce)

<0.8 V at VCC = 3.3 V, TA = 25°C

· Typical VOHV (Output VOH Undershoot)

>2 V at VCC = 3.3 V, TA = 25°C

· Supports Mixed-Mode Signal Operation on All

Ports (5-V Input/Output Voltage

With 3.3-V VCC)

· Ioff Supports Partial-Power-Down Mode

Operation

· Bus Hold on Data Inputs Eliminates the Need

for External Pullup/Pulldown Resistors

· Latch-Up Performance Exceeds 250 mA Per

JESD 17

· ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

– 1000-V Charged-Device Model (C101)

DESCRIPTION/ORDERING INFORMATION

This 16-bit registered transceiver is designed for

1.65-V to 3.6-V VCC operation.

The SN74LVCH16952A contains two sets of D-type

flip-flops for temporary storage of data flowing in

either direction. The device can be used as two 8-bit

transceivers or one 16-bit transceiver. Data on the A

or B bus is stored in the registers on the low-to-high

transition of the clock (CLKAB or CLKBA) input,

provided that the clock-enable (CEAB or CEBA) input

is low. Taking the output-enable (OEAB or OEBA)

input low accesses the data on either port.

更新时间:2026-2-10 15:14:00
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