1 Features

1• Available in the Texas Instruments

NanoStar™ and NanoFree™ Package

• Supports 5-V VCC Operation

• Inputs Accept Voltages to 5.5 V

• Max tpd of 4.7 ns at 3.3 V

• Low Power Consumption, 10-μA Maximum I CC

• ±24-mA Output Drive at 3.3 V

• Typical V OLP (Output Ground Bounce)

<0.8 V at VCC = 3.3 V, TA = 25°C

• Typical VOHV (Output VOH Undershoot)

>2 V at VCC = 3.3 V, TA = 25°C

• Ioff Supports Live Insertion, Partial-Power-Down

Mode, and Back-Drive Protection

• Can Be Used as a Down Translator to Translate

Inputs From a Maximum of 5.5 V Down to the VCC

Level

• Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

• ESD Protection Exceeds JESD 22

– 2000-V Human Body Model (A114-A)

– 1000-V Charged-Device Model (C101)

2 Applications

• IP Phones: Wired and Wireless

• Optical Networking: EPON and Video Over Fiber

• Point-to-Point Microwave Backhaul

• Power: Telecom DC/DC Module: Analog

• Power: Telecom DC/DC Module: Digital

• Private Branch Exchange (PBX)

• Telecom Shelter: Power Distribution Unit (PDU)

• Vector Signal Analyzers and Generators

• Wireless Communications Testers

• Wireless Repeaters

• xDSL Modem/DSLAM

Y = A x B or Y = A + B

3 Description

This dual 2-input positive-AND gate is designed for

1.65-V to 5.5-V VCC operation.

The SN74LVC2G08 device performs the Boolean

function in positive logic.

NanoFree package technology is a major

breakthrough in IC packaging concepts, using the die

as the package.

This device is fully specified for partial-power-down

applications using Ioff. The Ioff circuitry disables the

outputs, preventing damaging current backflow

through the device when it is powered down.