1 Features

1• Available in the Texas Instruments

NanoFree™ Package

• Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

• ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

– 1000-V Charged-Device Model (C101)

• Supports 5-V VCC Operation

• Inputs Accept Voltages to 5.5 V

• Supports Down Translation to VCC

• Max tpd of 6 ns at 3.3 V and 50 pF load

• Low Power Consumption, 10-μA Max ICC

• ±24-mA Output Drive at 3.3 V

• Ioff supports Partial-Power-Down Mode and Back-

Drive Protection

2 Applications

• Test and Measurement

• Enterprise Switching

• Telecom Infrastructure

• Personal Electronics

• White Goods

3 Description

The SN74LVC1G79 device is a single positive-edgetriggered

D-type flip-flop that is designed for 1.65-V to

5.5-V VCC operation.

When data at the data (D) input meets the setup time

requirement, the data is transferred to the Q output

on the positive-going edge of the clock pulse. Clock

triggering occurs at a voltage level and is not directly

related to the rise time of the clock pulse. Following

the hold-time interval, data at the D input can be

changed without affecting the level at the output.

NanoFree™ package technology is a major

breakthrough in IC packaging concepts, using the die

as the package.

This device is fully specified for partial-power-down

applications using Ioff. The Ioff circuitry disables the

outputs when the device is powered down. This

inhibits current backflow into the device which

prevents damage to the device.