1 Features

1• Available in the Ultra-Small 0.64 mm2

Package (DPW) with 0.5-mm Pitch

• Supports 5-V VCC Operation

• Inputs Accept Voltages to 5.5-V

• Supports Down Translation to VCC

• Max tpd of 3.6 ns at 3.3-V

• Low Power Consumption, 10-μA Max ICC

• ±24-mA Output Drive at 3.3-V

• Ioff Supports Live Insertion, Partial-Power-Down

Mode, and Back-Drive Protection

• Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

• ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

– 1000-V Charged-Device Model (C101)

2 Applications

• AV Receiver

• Blu-ray Player and Home Theater

• Digital Picture Frame (DPF)

• Embedded PC

• IP Phone: Wireless

• High-Speed Data Acquisition and Generation

• Motor Control: High-Voltage

• Optical Networking: Video Over Fiber and EPON

• Personal Navigation Device (GPS)

• Portable Media Player

• Private Branch Exchange (PBX)

• Server PSU

• SSD: Internal and External

• TV: LCD/Digital and High-Definition (HDTV)

• Telecom Shelter: Power Distribution Unit (PDU),

Power Monitoring Unit (PMU), Wireless Battery

Monitoring, Remote Electrical Tilt Unit (RET),

Remote Radio Unit (RRU), Tower Mounted

Amplifier (TMA)

• Video Conferencing: IP-Based HD

• Vector Signal Analyzer and Generator

• WiMAX and Wireless Infrastructure Equipment

• Wireless Headset, Keyboard, Mouse, and

Repeater

Y = A + B or Y = A • B

3 Description

This single 2-input positive-OR gate is designed for

1.65-V to 5.5-V VCC operation.

The SN74LVC1G32 device performs the Boolean

function in positive logic.

The CMOS device has high output drive while

maintaining low static power dissipation over a broad

VCC operating range.

The SN74LVC1G32 device is available in a variety of

packages, including the ultra-small DPW package

with a body size of 0.8 × 0.8 mm.