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SN74LVC1G10DSFR.B中文资料

厂家型号

SN74LVC1G10DSFR.B

文件大小

1756.17Kbytes

页面数量

29

功能描述

Single 3-Input Positive-NAND Gate

数据手册

下载地址一下载地址二到原厂下载

生产厂商

TI2

SN74LVC1G10DSFR.B数据手册规格书PDF详情

1FEATURES

2• Available in the Texas Instruments NanoFree™

Package

• Supports 5-V VCC Operation

• Inputs Accept Voltages to 5.5 V

• Provides Down Translation to VCC • Max t pd of 3.8 ns at 3.3 V

• Low Power Consumption, 10-μA Max ICC

• ±24-mA Output Drive at 3.3 V

• Ioff Supports Live Insertion, Partial-Power-

Down Mode, and Back Drive Protection

• Latch-Up Performance Exceeds 100 mA per

JESD 78, Class II

• ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

– 1000-V Charged Device Model (C101).

DESCRIPTION

The SN74LVC1G10 performs the Boolean function Y

= A • B • C or Y = A + B + C in positive logic.

NanoFree™ package technology is a major

breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down

applications using Ioff. The Ioff circuitry disables the

outputs, preventing damaging current backflow

through the device when it is powered down.

更新时间:2025-11-30 15:13:00
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