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SN74LS173AN中文资料

厂家型号

SN74LS173AN

文件大小

966.44Kbytes

页面数量

19

功能描述

4-BIT D-TYPE REGISTERS WITH 3-STATE OUTPUTS

触发器 4bit w/Tri-St Out

数据手册

原厂下载下载地址一下载地址二到原厂下载

生产厂商

TI2

SN74LS173AN数据手册规格书PDF详情

3-State Outputs Interface Directly With

System Bus

Gated Output-Control LInes for Enabling or

Disabling the Outputs

Fully Independent Clock Virtually

Eliminates Restrictions for Operating in

One of Two Modes:

– Parallel Load

– Do Nothing (Hold)

For Application as Bus Buffer Registers

Package Options Include Plastic

Small-Outline (D) Packages, Ceramic Flat

(W) Packages, Ceramic Chip Carriers (FK),

and Standard Plastic (N) and Ceramic (J)

DIPs

description

The ’173 and ’LS173A 4-bit registers include

D-type flip-flops featuring totem-pole 3-state

outputs capable of driving highly capacitive

or relatively low-impedance loads. The

high-impedance third state and increased

high-logic-level drive provide these flip-flops with

the capability of being connected directly to and

driving the bus lines in a bus-organized system without need for interface or pull-up components. Up to 128 of

the SN74173 or SN74LS173A outputs can be connected to a common bus and still drive two Series 54/74 or

54LS/74LS TTL normalized loads, respectively. Similarly, up to 49 of the SN54173 or SN54LS173A outputs can

be connected to a common bus and drive one additional Series 54/74 or 54LS/74LS TTL normalized load,

respectively. To minimize the possibility that two outputs will attempt to take a common bus to opposite logic

levels, the output control circuitry is designed so that the average output disable times are shorter than the

average output enable times.

Gated enable inputs are provided on these devices for controlling the entry of data into the flip-flops. When both

data-enable (G1, G2) inputs are low, data at the D inputs are loaded into their respective flip-flops on the next

positive transition of the buffered clock input. Gate output-control (M, N) inputs also are provided. When both

are low, the normal logic states (high or low levels) of the four outputs are available for driving the loads or bus

lines. The outputs are disabled independently from the level of the clock by a high logic level at either

output-control input. The outputs then present a high impedance and neither load nor drive the bus line. Detailed

operation is given in the function table.

The SN54173 and SN54LS173A are characterized for operation over the full military temperature range of

–55°C to 125°C. The SN74173 and SN74LS173A are characterized for operation from 0°C to 70°C.

SN74LS173AN产品属性

  • 类型

    描述

  • 型号

    SN74LS173AN

  • 功能描述

    触发器 4bit w/Tri-St Out

  • RoHS

  • 制造商

    Texas Instruments

  • 电路数量

    2

  • 逻辑系列

    SN74

  • 逻辑类型

    D-Type Flip-Flop

  • 极性

    Inverting, Non-Inverting

  • 输入类型

    CMOS

  • 传播延迟时间

    4.4 ns

  • 高电平输出电流

    - 16 mA

  • 低电平输出电流

    16 mA

  • 电源电压-最大

    5.5 V

  • 最大工作温度

    + 85 C

  • 安装风格

    SMD/SMT

  • 封装/箱体

    X2SON-8

  • 封装

    Reel

更新时间:2025-10-8 8:12:00
供应商 型号 品牌 批号 封装 库存 备注 价格
TI(德州仪器)
24+
PDIP16
924
只做原装,提供一站式配单服务,代工代料。BOM配单
TI
25+
DIP-16
58474
百分百原装正品 真实公司现货库存 本公司只做原装 可
24+
DIP16
3000
自己现货
TI
25+
高频管
18000
原厂直接发货进口原装
TMS
05+
PDIP
1000
全新原装 绝对有货
TI
23+
DIP
5500
现货,全新原装
TI
24+
DIP
7860
原装现货假一罚十
TI
23+
DIP16
5000
原装正品,假一罚十
TI
1650+
?
14860
只做原装进口,假一罚十
TI
25+
DIP
2987
只售原装自家现货!诚信经营!欢迎来电!

SN74LS173ANE4 价格

参考价格:¥3.9802

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