Operating Voltage Range of 4.5 V to 5.5 V

Low Power Consumption, 80-μA Max ICC

Typical tpd = 12 ns

±6-mA Output Drive at 5 V

Low Input Current of 1 μA Max

Inputs Are TTL-Voltage Compatible

Independent Registers for A and B Buses

Multiplexed Real-Time and Stored Data

True Data Paths

High-Current 3-State Outputs Can Drive Up

To 15 LSTTL Loads

description/ordering information

The ’HCT646 devices consist of bus-transceiver circuits with 3-state outputs, D-type flip-flops, and control

circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers.

Data on the A or B bus is clocked into the registers on the low-to-high transition of the appropriate clock (CLKAB

or CLKBA) input. Figure 1 illustrates the four fundamental bus-management functions that can be performed

with the ’HCT646 devices.

Output-enable (OE) and direction-control (DIR) inputs control the transceiver functions. In the transceiver

mode, data present at the high-impedance port can be stored in either or both registers.