位置:SN74GTLPH16912VR > SN74GTLPH16912VR详情

SN74GTLPH16912VR中文资料

厂家型号

SN74GTLPH16912VR

文件大小

1052.95Kbytes

页面数量

19

功能描述

18-BIT LVTTL-TO-GTLP UNIVERSAL BUS TRANSCEIVER

总线收发器 18-Bit LVTTL-to-GTLP Univ Bus Transceiver

数据手册

原厂下载下载地址一下载地址二到原厂下载

生产厂商

TI2

SN74GTLPH16912VR数据手册规格书PDF详情

FEATURES

· Member of the Texas Instruments Widebus™

Family

· UBT™ Transceiver Combines D-Type Latches

and D-Type Flip-Flops for Operation in

Transparent, Latched, Clocked, and

Clock-Enabled Modes

· TI-OPC™ Circuitry Limits Ringing on

Unevenly Loaded Backplanes

· OEC™ Circuitry Improves Signal Integrity and

Reduces Electromagnetic Interference

· Bidirectional Interface Between GTLP Signal

Levels and LVTTL Logic Levels

· LVTTL Interfaces Are 5-V Tolerant

· Medium-Drive GTLP Outputs (50 mA)

· LVTTL Outputs (–24 mA/24 mA)

· GTLP Rise and Fall Times Designed for

Optimal Data-Transfer Rate and Signal

Integrity in Distributed Loads

· Ioff, Power-Up 3-State, and BIAS VCC Support

Live Insertion

· Bus Hold on A-Port Data Inputs

· Distributed VCC and GND Pins Minimize

High-Speed Switching Noise

· Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

· ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

– 1000-V Charged-Device Model (C101)

DESCRIPTION/ORDERING INFORMATION

The SN74GTLPH16912 is a medium-drive, 18-bit UBT™ transceiver that provides LVTTL-to-GTLP and

GTLP-to-LVTTL signal-level translation. It allows for transparent, latched, clocked, and clock-enabled modes of

data transfer. The device provides a high-speed interface between cards operating at LVTTL logic levels and a

backplane operating at GTLP signal levels. High-speed (about three times faster than standard TTL or LVTTL)

backplane operation is a direct result of GTLP's reduced output swing (<1 V), reduced input threshold levels,

improved differential input, OEC™ circuitry, and TI-OPC™ circuitry. Improved GTLP OEC and TI-OPC circuits

minimize bus-settling time and have been designed and tested using several backplane models. The medium

drive allows incident-wave switching in heavily loaded backplanes with equivalent load impedance down to 19 W.

GTLP is the Texas Instruments (TI™) derivative of the Gunning Transceiver Logic (GTL) JEDEC standard

JESD 8-3. The ac specification of the SN74GTLPH16912 is given only at the preferred higher noise-margin

GTLP, but the user has the flexibility of using this device at either GTL (VTT = 1.2 V and VREF = 0.8 V) or GTLP

(VTT = 1.5 V and VREF = 1 V) signal levels.

SN74GTLPH16912VR产品属性

  • 类型

    描述

  • 型号

    SN74GTLPH16912VR

  • 功能描述

    总线收发器 18-Bit LVTTL-to-GTLP Univ Bus Transceiver

  • RoHS

  • 制造商

    Fairchild Semiconductor

  • 逻辑类型

    CMOS

  • 逻辑系列

    74VCX

  • 每芯片的通道数量

    16

  • 输入电平

    CMOS

  • 输出电平

    CMOS

  • 输出类型

    3-State

  • 高电平输出电流

    - 24 mA

  • 低电平输出电流

    24 mA

  • 传播延迟时间

    6.2 ns

  • 电源电压-最大

    2.7 V, 3.6 V

  • 电源电压-最小

    1.65 V, 2.3 V

  • 最大工作温度

    + 85 C

  • 封装/箱体

    TSSOP-48

  • 封装

    Reel

更新时间:2025-10-10 11:16:00
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