* Member of the Texas Instruments

Widebus Family

* Undershoot Protection for Off-Isolation on

A and B Ports Up to −2 V

* Bidirectional Data Flow, With Near-Zero

Propagation Delay

* Low ON-State Resistance (ron)

Characteristics (ron = 3 Ω Typical)

* Low Input/Output Capacitance Minimizes

Loading and Signal Distortion

(Cio(OFF) = 5.5 pF Typical)

* Data and Control Inputs Provide

Undershoot Clamp Diodes

* Low Power Consumption

(ICC = 3 µA Max)

* VCC Operating Range From 4 V to 5.5 V

* Data I/Os Support 0 to 5-V Signaling Levels

(0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)

* Control Inputs Can be Driven by TTL or

5-V/3.3-V CMOS Outputs

* Ioff Supports Partial-Power-Down Mode

Operation

* Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

* ESD Performance Tested Per JESD 22

− 2000-V Human-Body Model

(A114-B, Class II)

− 1000-V Charged-Device Model (C101)

* Supports Both Digital and Analog

Applications: PCI Interface, Memory

Interleaving, Bus Isolation, Low-Distortion

Signal Gating