1 Features

• Available in the Texas Instruments NanoFree™

package

• Fully configurable dual-rail design allows each port

to operate over the full 1.08V to 3.6V power-supply

range

• VCC isolation feature – if either VCC input is at

GND, then both ports are in the high-impedance

state

• DIR input circuit referenced to VCCA

• ±12mA output drive at 3.3V

• I/Os are 4.6V tolerant

• Ioff supports partial-power-down mode operation

• Typical maximum data rates

– 500Mbps (1.08V to 3.3V translation)

– 320Mbps (<1.8V to 3.3V translation)

– 320Mbps (translate to 2.5V or 1.8V)

– 280Mbps (translate to 1.5V)

– 240Mbps (translate to 1.2V)

• Latch-up performance exceeds 100mA per JESD

78, Class II

• ESD protection exceeds JESD 22

– ±2000V Human Body Model (A114-A)

– 200V Machine Model (A115-A)

– ±1000V Charged-Device Model (C101)

2 Applications

• Personal electronic

• Industrial

• Enterprise

• Telecom

3 Description

This single-bit noninverting bus transceiver uses

two separate configurable power-supply rails. The

SN74AVC1T45-Q1 is operational with VCCA/VCCB as

low as 1.08V.

The A port is designed to track VCCA. VCCA accepts

any supply voltage from 1.08V to 3.6V. The B port

is designed to track VCCB. VCCB accepts any supply

voltage from 1.08V to 3.6V. This allows for universal

low-voltage, bidirectional translation between any of

the 1.2V, 1.5V, 1.8V, 2.5V, and 3.3V voltage nodes.

The SN74AVC1T45-Q1 is designed for asynchronous

communication between two data buses. The logic

levels of the direction-control (DIR) input activate

either the B-port outputs or the A-port outputs. The

device transmits data from the A bus to the B bus

when the B-port outputs are activated and from the

B bus to the A bus when the A-port outputs are

activated. The input circuitry on both A and B ports

always is active and must have a logic HIGH or LOW

level applied to prevent excess ICC and ICCZ.

The SN74AVC1T45-Q1 is designed so that the DIR

input is powered by VCCA.

This device is fully specified for partial-power-down

applications using Ioff. The Ioff circuitry disables

the outputs, preventing damaging current backflow

through the device when it is powered down.

The VCC isolation feature is designed so that if either

VCC input is at GND, then both ports are in the highimpedance

state.

NanoFree package technology is a major

breakthrough in IC packaging concepts, using the die

as the package.