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SN74AVC16334DGVR中文资料

厂家型号

SN74AVC16334DGVR

文件大小

475.89Kbytes

页面数量

19

功能描述

16-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS

通用总线函数 16bit Univ

数据手册

原厂下载下载地址一下载地址二到原厂下载

生产厂商

TI2

SN74AVC16334DGVR数据手册规格书PDF详情

FEATURES

· Member of the Texas Instruments Widebus™

Family

· DOC™ (Dynamic Output Control) Circuit

Dynamically Changes Output Impedance,

Resulting in Noise Reduction Without Speed

Degradation

· Dynamic Drive Capability Is Equivalent to

Standard Outputs With IOH and IOL of ±24 mA

at 2.5-V VCC

· Overvoltage-Tolerant Inputs/Outputs Allow

Mixed-Voltage-Mode Data Communications

· Ioff Supports Partial-Power-Down Mode

Operation

· ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

· Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

DESCRIPTION

A Dynamic Output Control (DOC™) circuit is implemented, which, during the transition, initially lowers the output

impedance to effectively drive the load and, subsequently, raises the impedance to reduce noise. Figure 1 shows

typical VOL vs IOL and VOH vs IOH curves to illustrate the output impedance and drive capability of the circuit. At

the beginning of the signal transition, the DOC circuit provides a maximum dynamic drive that is equivalent to a

high-drive standard-output device. For more information, refer to the TI application reports, AVC Logic Family

Technology and Applications, literature number SCEA006, and Dynamic Output Control (DOC™) Circuitry

Technology and Applications, literature number SCEA009.

This 16-bit universal bus driver is operational at 1.2-V to 3.6-V VCC, but is designed specifically for 1.65-V to

3.6-V VCC operation.

Data flow from A to Y is controlled by the output-enable (OE) input. The device operates in the transparent mode

when the latch-enable (LE) input is low. When LE is high, the A data is latched if the clock (CLK) input is held at

a high or low logic level. If LE is high, the A data is stored in the latch/flip-flop on the low-to-high transition of

CLK. When OE is high, the outputs are in the high-impedance state.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,

preventing damaging current backflow through the device when it is powered down.

SN74AVC16334DGVR产品属性

  • 类型

    描述

  • 型号

    SN74AVC16334DGVR

  • 功能描述

    通用总线函数 16bit Univ

  • RoHS

  • 制造商

    Texas Instruments

  • 逻辑类型

    CMOS

  • 逻辑系列

    74VMEH

  • 电路数量

    1

  • 传播延迟时间

    10.1 ns

  • 电源电压-最大

    3.45 V

  • 电源电压-最小

    3.15 V

  • 最大工作温度

    + 85 C

  • 最小工作温度

    0 C

  • 封装/箱体

    TSSOP-48

  • 封装

    Reel

更新时间:2026-2-9 10:02:00
供应商 型号 品牌 批号 封装 库存 备注 价格
Texas Instruments
24+
48-TVSOP
65300
一级代理/放心采购
TI
25+
SSOP-48
3854
就找我吧!--邀您体验愉快问购元件!
TI(德州仪器)
2021+
TVSOP-48
499
TI/德州仪器
21+
NA
12820
只做原装,质量保证
TI
22+
48TVSOP
9000
原厂渠道,现货配单
TI/德州仪器
22+
N/A
10000
现货,原厂原装假一罚十!
TI
23+
TVSOP-48
56068
公司原装现货!主营品牌!可含税欢迎查询
TI/德州仪器
25+
TVSOP-48
860000
明嘉莱只做原装正品现货
Texas Instruments(德州仪器)
24+
48-TFSOP (0.173, 4.40mm Width
690000
代理渠道/支持实单/只做原装
24+
N/A
73000
一级代理-主营优势-实惠价格-不悔选择

SN74AVC16334DGVR 价格

参考价格:¥16.4377

型号:SN74AVC16334DGVR 品牌:TI 备注:这里有SN74AVC16334DGVR多少钱,2026年最近7天走势,今日出价,今日竞价,SN74AVC16334DGVR批发/采购报价,SN74AVC16334DGVR行情走势销售排排榜,SN74AVC16334DGVR报价。