Eight Latches in a Single Package

3-State Bus-Driving Inverting Outputs

Full Parallel Access for Loading

Buffered Control Inputs

pnp Inputs Reduce dc Loading on

Data Lines

Package Options Include Plastic

Small-Outline (DW) Packages and Standard

Plastic (N) 300-mil DIPs

description

These 8-bit D-type transparent latches feature

3-state outputs designed specifically for driving

highly capacitive or relatively low-impedance

loads. They are particularly suitable for

implementing buffer registers, I/O ports,

bidirectional bus drivers, and working registers.

While latch-enable (LE) input is high, the Q outputs follow the complements of the data (D) inputs. When LE is

taken low, the Q outputs are latched at the inverses of the levels set up at the D inputs. The SN74ALS533A and

SN74AS533A are functionally equivalent to the SN74ALS373A and SN74AS373, except for having inverted

outputs.

A buffered output-enable (OE) input places the eight outputs in either a normal logic state (high or low logic

levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines

significantly. The high-impedance state and increased drive provide the capability to drive bus lines without

interface or pullup components.

OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered

while the outputs are off.

The SN74ALS533A and SN74AS533A are characterized for operation from 0°C to 70°C.