State-of-the-Art EPIC-IIBE BiCMOS Design

Significantly Reduces Power Dissipation

ESD Protection Exceeds 2000 V Per

MIL-STD-883, Method 3015; Exceeds 200 V

Using Machine Model (C = 200 pF, R = 0)

Latch-Up Performance Exceeds 500 mA Per

JESD 17

Typical VOLP (Output Ground Bounce) < 1 V

at VCC = 5 V, TA = 25°C

High-Drive Outputs (–32-mA IOH,

64-mA IOL)

Package Options Include Plastic

Small-Outline (DW), Shrink Small-Outline

(DB), and Thin Shrink Small-Outline (PW)

Packages, Ceramic Chip Carriers (FK), and

Plastic (N) and Ceramic (J) DIPs

description

These octal bus transceivers provide for

asynchronous communication between data

buses. The control-function implementation

allows for maximum flexibility in timing. The

’ABT620 devices provide inverted data at the

outputs.

These devices allow data transmission from the

A bus to the B bus or from the B bus to the A bus,

depending on the logic levels at the output-enable

(OEAB and OEBA) inputs.

The output-enable inputs can be used to disable the device so that the buses are effectively isolated. The

dual-enable configuration gives the transceivers the capability of storing data by simultaneously enabling OEAB

and OEBA. When both OEAB and OEBA are enabled and all other data sources to the two sets of bus lines

are at high impedance, both sets of bus lines (16 total) remain at their last states. In this way, each output

reinforces its input in this configuration.

To ensure the high-impedance state during power up or power down, OEBA should be tied to VCC through a

pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

OEAB should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by

the current-sourcing capability of the driver.

The SN54ABT620 is characterized for operation over the full military temperature range of –55°C to 125°C. The

SN74ABT620 is characterized for operation from –40°C to 85°C.