位置:SN65MLVD207DR > SN65MLVD207DR详情

SN65MLVD207DR中文资料

厂家型号

SN65MLVD207DR

文件大小

861.84Kbytes

页面数量

31

功能描述

MULTIPOINT-LVDS LINE DRIVER AND RECEIVER

LVDS 接口集成电路 Full-Duplex M-LVDS Transceiver

数据手册

原厂下载下载地址一下载地址二到原厂下载

生产厂商

TI2

SN65MLVD207DR数据手册规格书PDF详情

1FEATURES

· Low-Voltage Differential 30-Ω to 55-Ω Line

Drivers and Receivers for Signaling Rates(1)

Up to 200 Mbps

· Type-1 Receivers Incorporate 25 mV of

Hysteresis

· Type-2 Receivers Provide an Offset (100 mV)

Threshold to Detect Open-Circuit and Idle-Bus

Conditions

· Meets or Exceeds the M-LVDS Standard

TIA/EIA-899 for Multipoint Data Interchange

· Controlled Driver Output Voltage Transition

Times for Improved Signal Quality

· -1 V to 3.4 V Common-Mode Voltage Range

Allows Data Transfer With 2 V of Ground Noise

· Bus Pins High Impedance When Disabled or

VCC ≤ 1.5 V

· 100-Mbps Devices Available (SN65MLVD200A,

202A, 204A, 205A)

· M-LVDS Bus Power Up/Down Glitch Free

The signaling rate of a line, is the number of voltage transitions

that are made per second expressed in the units bps (bits per

second).

APPLICATIONS

· Low-Power High-Speed Short-Reach

Alternative to TIA/EIA-485

· Backplane or Cabled Multipoint Data and

Clock Transmission

· Cellular Base Stations

· Central-Office Switches

· Network Switches and Routers

DESCRIPTION

The SN65MLVD201, 203, 206, and 207 are

multipoint-low-voltage differential (M-LVDS) line

drivers and receivers, which are optimized to operate at signaling rates up to 200 Mbps. All parts comply

with the multipoint low-voltage differential signaling

(M-LVDS) standard TIA/EIA-899. These circuits are

similar to their TIA/EIA-644 standard compliant LVDS

counterparts, with added features to address

multipoint applications. The driver output has been

designed to support multipoint buses presenting loads as low as 30 Ω, and incorporates controlled

transition times to allow for stubs off of the backbone

transmission line.

These devices have Type-1 and Type-2 receivers

that detect the bus state with as little as 50 mV of

differential input voltage over a common-mode

voltage range of -1 V to 3.4 V. The Type-1 receivers

exhibit 25 mV of differential input voltage hysteresis

to prevent output oscillations with slowly changing

signals or loss of input. Type-2 receivers include an

offset threshold to provide a known output state

under open-circuit, idle-bus, and other faults

conditions. The devices are characterized for

operation from –40°C to 85°C.

SN65MLVD207DR产品属性

  • 类型

    描述

  • 型号

    SN65MLVD207DR

  • 功能描述

    LVDS 接口集成电路 Full-Duplex M-LVDS Transceiver

  • RoHS

  • 制造商

    Texas Instruments

  • 激励器数量

    4

  • 接收机数量

    4

  • 数据速率

    155.5 Mbps

  • 工作电源电压

    5 V

  • 最大功率耗散

    1025 mW

  • 最大工作温度

    + 85 C

  • 封装/箱体

    SOIC-16 Narrow

  • 封装

    Reel

更新时间:2025-10-11 11:03:00
供应商 型号 品牌 批号 封装 库存 备注 价格
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