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SN65MLVD203中文资料
SN65MLVD203数据手册规格书PDF详情
1FEATURES
· Low-Voltage Differential 30-Ω to 55-Ω Line
Drivers and Receivers for Signaling Rates(1)
Up to 200 Mbps
· Type-1 Receivers Incorporate 25 mV of
Hysteresis
· Type-2 Receivers Provide an Offset (100 mV)
Threshold to Detect Open-Circuit and Idle-Bus
Conditions
· Meets or Exceeds the M-LVDS Standard
TIA/EIA-899 for Multipoint Data Interchange
· Controlled Driver Output Voltage Transition
Times for Improved Signal Quality
· -1 V to 3.4 V Common-Mode Voltage Range
Allows Data Transfer With 2 V of Ground Noise
· Bus Pins High Impedance When Disabled or
VCC ≤ 1.5 V
· 100-Mbps Devices Available (SN65MLVD200A,
202A, 204A, 205A)
· M-LVDS Bus Power Up/Down Glitch Free
The signaling rate of a line, is the number of voltage transitions
that are made per second expressed in the units bps (bits per
second).
APPLICATIONS
· Low-Power High-Speed Short-Reach
Alternative to TIA/EIA-485
· Backplane or Cabled Multipoint Data and
Clock Transmission
· Cellular Base Stations
· Central-Office Switches
· Network Switches and Routers
DESCRIPTION
The SN65MLVD201, 203, 206, and 207 are
multipoint-low-voltage differential (M-LVDS) line
drivers and receivers, which are optimized to operate at signaling rates up to 200 Mbps. All parts comply
with the multipoint low-voltage differential signaling
(M-LVDS) standard TIA/EIA-899. These circuits are
similar to their TIA/EIA-644 standard compliant LVDS
counterparts, with added features to address
multipoint applications. The driver output has been
designed to support multipoint buses presenting loads as low as 30 Ω, and incorporates controlled
transition times to allow for stubs off of the backbone
transmission line.
These devices have Type-1 and Type-2 receivers
that detect the bus state with as little as 50 mV of
differential input voltage over a common-mode
voltage range of -1 V to 3.4 V. The Type-1 receivers
exhibit 25 mV of differential input voltage hysteresis
to prevent output oscillations with slowly changing
signals or loss of input. Type-2 receivers include an
offset threshold to provide a known output state
under open-circuit, idle-bus, and other faults
conditions. The devices are characterized for
operation from –40°C to 85°C.
SN65MLVD203产品属性
- 类型
描述
- 型号
SN65MLVD203
- 功能描述
LVDS 接口集成电路 MultiPnt LVDS
- RoHS
否
- 制造商
Texas Instruments
- 激励器数量
4
- 接收机数量
4
- 数据速率
155.5 Mbps
- 工作电源电压
5 V
- 最大功率耗散
1025 mW
- 最大工作温度
+ 85 C
- 封装/箱体
SOIC-16 Narrow
- 封装
Reel
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
TI(德州仪器) |
24+ |
标准封装 |
9548 |
原厂直销,大量现货库存,交期快。价格优,支持账期 |
|||
TI/德州仪器 |
23+ |
SOP14 |
29600 |
一级分销商! |
|||
TI/德州仪器 |
25+ |
SOP14 |
5392 |
原装优势公司现货! |
|||
TI(德州仪器) |
24+ |
SOP-14 |
7828 |
支持大陆交货,美金交易。原装现货库存。 |
|||
TI |
24+ |
SOIC|14 |
55200 |
免费送样原盒原包现货一手渠道联系 |
|||
TI德州仪器 |
22+ |
24000 |
原装正品现货,实单可谈,量大价优 |
||||
TI |
24+ |
SOP14 |
244 |
||||
TI |
24+ |
原厂封装 |
7860 |
原装现货假一罚十 |
|||
TI |
2016+ |
SOP114 |
6000 |
只做原装,假一罚十,公司可开17%增值税发票! |
|||
TI |
16+ |
SOP14 |
8000 |
原装现货请来电咨询 |
SN65MLVD203DR 价格
参考价格:¥12.9744
SN65MLVD203 资料下载更多...
SN65MLVD203 芯片相关型号
- 212240
- 895-102-540-201
- 895-102-540-202
- 895-102-540-203
- 895-102-540-204
- 895-102-540-207
- 895-102-540-804
- 895-102-540-807
- 895-102-540-808
- PJP7G
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- RH01010K00FE01
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- RH01010K00FJ01
- RH01010K00HC02
- RH01010K00HE01
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