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SN65MLVD080DGGR中文资料
SN65MLVD080DGGR数据手册规格书PDF详情
FEATURES
· Low-Voltage Differential 30-W to 55-W Line
Drivers and Receivers for Signaling Rates (1)
Up to 250 Mbps; Clock Frequencies Up to
125 MHz
· Meets or Exceeds the M-LVDS Standard
TIA/EIA-899 for Multipoint Data Interchange
· Controlled Driver Output Voltage Transition
Times for Improved Signal Quality
· –1 V to 3.4 V Common-Mode Voltage Range
Allows Data Transfer With 2 V of Ground
Noise
· Bus Pins High Impedance When Driver
Disabled or V CC £ 1.5 V
· Independent Enables for each Driver
· Bus Pin ESD Protection Exceeds 8 kV
· Packaged in 64-Pin TSSOP (DGG)
· M-LVDS Bus Power Up/Down Glitch Free
APPLICATIONS
· Parallel Multipoint Data and Clock
Transmission Via Backplanes and Cables
· Low-Power High-Speed Short-Reach
Alternative to TIA/EIA-485
· Cellular Base Stations
· Central-Office Switches
· Network Switches and Routers
DESCRIPTION
The SN65MLVD080 and SN65MLVD082 provide
eight half-duplex transceivers for transmitting and
receiving Multipoint-Low-Voltage Differential Signals
in full compliance with the TIA/EIA-899 (M-LVDS)
standard, which are optimized to operate at signaling
rates up to 250 Mbps. The driver outputs have been
designed to support multipoint buses presenting
loads as low as 30-W and incorporates controlled
transition times to allow for stubs off of the backbone
transmission line.
The M-LVDS standard defines two types of receivers,
designated as Type-1 and Type-2. Type-1 receivers
(SN65MLVD080) have thresholds centered about
zero with 25 mV of hysteresis to prevent output
oscillations with loss of input; Type-2 receivers
(SN65MLVD082) implement a failsafe by using an
offset threshold. In addition, the driver rise and fall
times are between 1 and 2.0 ns, complying with the
M-LVDS standard to provide operation at 250 Mbps
while also accommodating stubs on the bus. Receiver outputs are slew rate controlled to reduce EMI and
crosstalk effects associated with large current surges.
The M-LVDS standard allows for 32 nodes on the bus
providing a high-speed replacement for RS-485
where lower common-mode can be tolerated or when
higher signaling rates are needed.
The driver logic inputs and the receiver logic outputs
are on separate pins rather than tied together as in
some transceiver designs. The drivers have separate
enables (DE) and the receivers are enabled globally
through (RE). This arrangement of separate logic
inputs, logic outputs, and enable pins allows for a
listen-while-talking operation. The devices are
characterized for operation from –40°C to 85°C.
SN65MLVD080DGGR产品属性
- 类型
描述
- 型号
SN65MLVD080DGGR
- 功能描述
LVDS 接口集成电路 8-Ch Half-Duplex M-LVDS Transceiver
- RoHS
否
- 制造商
Texas Instruments
- 激励器数量
4
- 接收机数量
4
- 数据速率
155.5 Mbps
- 工作电源电压
5 V
- 最大功率耗散
1025 mW
- 最大工作温度
+ 85 C
- 封装/箱体
SOIC-16 Narrow
- 封装
Reel
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
TI/德州仪器 |
2023+ |
TSSOP64 |
50000 |
专注军工、汽车、医疗、工业等方案配套一站式服务 |
|||
TI/德州仪器 |
25+ |
TSSOP-64 |
32360 |
TI/德州仪器全新特价SN65MLVD080DGGR即刻询购立享优惠#长期有货 |
|||
TI/德州仪器 |
2216+ |
TSSOP64 |
8000 |
原装正品假一罚十 |
|||
TI/德州仪器 |
23+ |
TSSOP64 |
15000 |
||||
TI(德州仪器) |
24+ |
TSSOP-64-6 |
9203 |
支持大陆交货,美金交易。原装现货库存。 |
|||
TI |
2024+ |
N/A |
70000 |
柒号只做原装 现货价秒杀全网 |
|||
TI |
24+ |
TSSOP64 |
2250 |
||||
TI |
24+ |
TSSOP64 |
6232 |
公司原厂原装现货假一罚十!特价出售!强势库存! |
|||
TI |
16+ |
TSSOP-64 |
8000 |
原装现货请来电咨询 |
|||
TexasInstruments |
18+ |
ICMLVDSTXRX8CH1/2DUP64TS |
6800 |
公司原装现货/欢迎来电咨询! |
SN65MLVD080DGGR 价格
参考价格:¥28.5925
SN65MLVD080DGGR 资料下载更多...
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Datasheet数据表PDF页码索引
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