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SN65LVDS104PW中文资料
SN65LVDS104PW数据手册规格书PDF详情
1 Features
1• Receiver and Drivers Meet or Exceed the
Requirements of ANSI EIA/TIA-644 Standard
– SN65LVDS105 Receives Low-Voltage TTL
(LVTTL) Levels
– SN65LVDS104 Receives Differential Input
Levels, ±100 mV
• Typical Data Signaling Rates to 400 Mbps or
Clock Frequencies to 400 MHz
• Operates From a Single 3.3-V Supply
• Low-Voltage Differential Signaling With Typical
Output Voltage of 350 mV and a 100-Ω Load
• Propagation Delay Time
– SN65LVDS105 – 2.2 ns (Typ)
– SN65LVDS104 – 3.1 ns (Typ)
• LVTTL Levels Are 5-V Tolerant
• Electrically Compatible With LVDS, PECL,
LVPECL, LVTTL, LVCMOS, GTL, BTL, CTT,
SSTL, or HSTL Outputs With External Networks
• Driver Outputs Are High-Impedance When
Disabled or With VCC <1.5 V
• Bus-Pin ESD Protection Exceeds 16 kV
• SOIC and TSSOP Packaging
2 Applications
• Clock Distribution
• Wireless Base Stations
• Network Routers
3 Description
The SN65LVDS10x are a differential line receiver and
a LVTTL input (respectively) connected to four
differential line drivers that implement the electrical
characteristics of low-voltage differential signaling
(LVDS). LVDS, as specified in EIA/TIA-644 is a data
signaling technique that offers low-power, low-noise
coupling, and switching speeds to transmit data at
relatively long distances. (Note: The ultimate rate and
distance of data transfer is dependent upon the attenuation characteristics of the media, the noise
coupling to the environment, and other system
characteristics.)
The intended application of this device and signaling
technique is for point-to-point baseband data
transmission over controlled impedance media of
approximately 100 Ω. The transmission media may be printed-circuit board traces, backplanes, or cables.
Having the drivers integrated into the same substrate,
along with the low pulse skew of balanced signaling,
allows extremely precise timing alignment of the
signals repeated from the input. This is particularly
advantageous in distribution or expansion of signals
such as clock or serial data stream.
The SN65LVDS10x are characterized for operation from –40°C to 85°C.
The SN65LVDS10x are members of a family of LVDS
repeaters. A brief overview of the family is provided in the Selection Guide to LVDS Repeaters section.
SN65LVDS104PW产品属性
- 类型
描述
- 型号
SN65LVDS104PW
- 功能描述
时钟驱动器及分配 LVDS Clock
- RoHS
否
- 制造商
Micrel
- 1
4
- 输出类型
Differential
- 最大输出频率
4.2 GHz
- 电源电压-最小
5 V
- 最大工作温度
+ 85 C
- 封装/箱体
SOIC-8
- 封装
Reel
| 供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
TI(德州仪器) |
23+ |
TSSOP-16 |
13650 |
公司只做原装正品,假一赔十 |
|||
TI/德州仪器 |
25+ |
SMD |
32360 |
TI/德州仪器全新特价SN65LVDS104PWR即刻询购立享优惠#长期有货 |
|||
TI |
17+ |
TSSOP16 |
6200 |
100%原装正品现货 |
|||
TI |
25+ |
16-TSSOP |
9500 |
百分百原装正品 真实公司现货库存 本公司只做原装 可 |
|||
TI |
23+ |
TSSOP-16 |
30000 |
全新原装正品 |
|||
TI/德州仪器 |
22+ |
TSSOP-16 |
500000 |
原装现货支持实单价优/含税 |
|||
TI/德州仪器 |
22+ |
TSSOP16 |
2000 |
经测试国产完美替代进口,包上机 |
|||
TI |
23+ |
TSSOP16 |
2152 |
新到现货 全新原装 |
|||
TI |
2021+ |
TSSOP16 |
6800 |
原厂原装,欢迎咨询 |
|||
TI/德州仪器 |
2023+ |
SMD |
53200 |
正品,原装现货 |
SN65LVDS104PWR 价格
参考价格:¥14.4802
SN65LVDS104PW 资料下载更多...
SN65LVDS104PW 芯片相关型号
- 0411-337-1205
- 0411-353-0805
- A2XBM0210C5G-X6B
- A2XBM0210C5G-XCL
- A2XBM0210C5G-XK8
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- A2XBM0210C6A-XCL
- A2XBM0210C6A-XK8
- DS90LV804TSQ/NOPB
- DS90LV804TSQ/NOPB.A
- DS90LV804TSQX/NOPB
- DS90LV804TSQX/NOPB.A
- EHT-113-01-L-D-RA-K
- EHT-113-01-L-D-RA-LC
- EHT-113-01-L-D-RA-P
- EHT-113-01-L-D-RA-TR
- EHT-113-01-L-D-RA-XX
- MCSP1250AM
- MCSP1250AS
- MCSP1250BM
- MCSP1250BS
- MCSP1250CM
- MCSP1250CS
- MCSP1250DM
- MCSP1250DS
- MCSP1250EM
- MCSP1250ES
- WSP-2CD-RSLASHE
- WSP-2CD-RSLASHQ
- WSP-2CD-V
TI2相关芯片制造商
Datasheet数据表PDF页码索引
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