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SN5ALS596中文资料

厂家型号

SN5ALS596

文件大小

567.5Kbytes

页面数量

16

功能描述

8-BIT SHIFT REGISTERS WITH OUTPUT LATCHES

数据手册

下载地址一下载地址二到原厂下载

生产厂商

TI2

SN5ALS596数据手册规格书PDF详情

8-Bit Serlal-In, Parallel-Out Shift

Registers with Storage

Choice of 3-State ('LS595) or

Open-Collector ('LS596) Parallel Outputs

Shift Register Has Direct Clear

Accurate Shift Frequency:

DC to 20 MHz

description

These devices each contain an 8-bit serial-in,

parallel-out shift register that feeds an 8-bit D-type

storage register. The Storage register has parallel

3-state ({'LS595} or open-collector {‘LS536! outputs.

Separate clocks are provided for both the shift register

and the storage register. The shift register has a

direct-overriding clear, serial input, and serial output

pins for cascading.

Both the shift register and storage register clocks are

positive-edge triggered. If the user wishes 10 connect

both clocks together, the shift register state will always

be one clock pulse ahead of the storage register.

更新时间:2026-3-8 15:14:00
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