Support Mixed-Mode Signal Operation

(5-V Input and Output Voltages With

3.3-V VCC)

Typical VOLP (Output Ground Bounce)

<0.8 V at VCC = 3.3 V, TA = 25°C

Support Unregulated Battery Operation

Down to 2.7 V

Ioff and Power-Up 3-State Support Hot

Insertion

Bus Hold on Data Inputs Eliminates the

Need for External Pullup/Pulldown

Resistors

Latch-Up Performance Exceeds 500 mA Per

JESD 17

ESD Protection Exceeds JESD 22

− 2000-V Human-Body Model (A114-A)

− 200-V Machine Model (A115-A)

description/ordering information

These octal flip-flops are designed specifically for

low-voltage (3.3-V) VCC operation, but with the

capability to provide a TTL interface to a

5-V system environment.

The eight flip-flops of the ’LVTH374 devices are

edge-triggered D-type flip-flops. On the positive

transition of the clock (CLK) input, the Q outputs

are set to the logic levels set up at the data (D)

inputs.