位置:PCM2900BDBR.B > PCM2900BDBR.B详情

PCM2900BDBR.B中文资料

厂家型号

PCM2900BDBR.B

文件大小

898.62Kbytes

页面数量

38

功能描述

STEREO AUDIO CODEC WITH USB INTERFACE, SINGLE-ENDED ANALOG INPUT/OUTPUT, AND S/PDIF

数据手册

下载地址一下载地址二到原厂下载

生产厂商

TI2

PCM2900BDBR.B数据手册规格书PDF详情

1FEATURES

234· PCM2900B: Without S/PDIF

· PCM2902B: With S/PDIF

· On-Chip USB Interface:

– With Full-Speed Transceivers

– Fully Compliant with USB 2.0 Specification

– Certified by USB-IF

– Partially Programmable Descriptors (1)

– USB Adaptive Mode for Playback

– USB Asynchronous Mode for Record

– Bus Powered

· 16-Bit Delta-Sigma ADC and DAC

· Sampling Rate:

– DAC: 32, 44.1, 48 kHz

– ADC: 8, 11.025, 16, 22.05, 32, 44.1, 48 kHz

· On-Chip Clock Generator with Single 12-MHz

Clock Source

· Single Power Supply:

– 5 V Typical (V BUS)

· Stereo ADC:

– Analog Performance at V BUS = 5 V:

– THD+N = 0.01%

– SNR = 89 dB

– Dynamic Range = 89 dB

– Decimation Digital Filter:

– Passband Ripple = ±0.05 dB

– Stop-Band Attenuation = 65 dB

– Single-Ended Voltage Input

– Antialiasing Filter Included

– Digital HPF Included

· Stereo DAC:

– Analog Performance at VBUS = 5 V:

– THD+N = 0.005%

– SNR = 96 dB

– Dynamic Range = 93 dB

– Oversampling Digital Filter:

– Passband Ripple = ±0.1 dB

– Stop-Band Attenuation = –43 dB

– Single-Ended Voltage Output

– Analog LPF Included

· Multifunctions:

– Human Interface Device (HID) Function:

– Volume and Mute Controls

– Suspend Flag Function

· 28-Pin SSOP Package

APPLICATIONS

· USB Audio Speaker

· USB Headset

· USB Monitor

· USB Audio Interface Box

DESCRIPTION

The PCM2900B/2902B is Texas Instruments'

single-chip, USB, stereo audio codec with a

USB-compliant full-speed protocol controller and

S/PDIF (PCM2902B only). The USB protocol controller requires no software code, but the USB

descriptors can be modified in some areas (for

example, vendor ID and/or product ID). The

PCM2900B/2902B employs SpAct™ architecture, TI's

unique system that recovers the audio clock from

USB packet data. On-chip analog PLLs with SpAct

architecture enable playback and record with low

clock jitter as well as independent playback and

record sampling rates.

更新时间:2025-10-14 11:10:00
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