位置:LMK3H0102-Q1 > LMK3H0102-Q1详情

LMK3H0102-Q1中文资料

厂家型号

LMK3H0102-Q1

文件大小

2644.65Kbytes

页面数量

62

功能描述

LMK3H0102-Q1 Reference-Less 2-Differential or 5-Single-Ended Output PCIe Gen 1-7 Compliant Programmable BAW Clock Generator

数据手册

下载地址一下载地址二到原厂下载

生产厂商

TI2

LMK3H0102-Q1数据手册规格书PDF详情

1 Features

• AEC-Q100 Grade 2 qualified for automotive

applications

• Ambient temperature: –40°C to 105°C

• Functional Safety-Capable:

– Documentation available to aid functional safety

system design

• Integrated BAW resonator, no need for external

reference

• Flexible frequency generation:

– Two channel dividers: up to three unique output

frequencies from 2.5MHz to 400MHz

– LVCMOS outputs supported up to 200MHz:

1.8V, 2.5V, or 3.3V

– Combination of AC-LVDS, DC-LVDS, LP-HCSL,

and LVCMOS on OUT0 and OUT1 pins

• Total output frequency stability: ±25ppm

• 2 functional modes: I2C or preprogrammed OTP

• PCIe Gen 1 to Gen 7 compliant: Common Clock

with or without SSC, SRNS, and SRIS

• Very low PCIe jitter with SSC:

– PCIe Gen 5 Common Clock jitter: 57.5fs

maximum (PCIe limit is 150fs)

– PCIe Gen 6 Common Clock jitter: 34.5fs

maximum (PCIe limit is 100fs)

– PCIe Gen 7 Common Clock jitter: 29.6fs

maximum (PCIe limit is 67fs)

• Programmable SSC modulation depth

– Preprogrammed: –0.1%, –0.25%, –0.3%,

and –0.5% down spread at 200MHz FOD

frequency

– Register programmable: –0.1% to –3% down

spread or ±0.05% to ±1.5% center spread

• 1.8V to 3.3V supply voltage

• Internal LDOs with –93.1dBc PSNR at 500kHz

switching noise for LP-HCSL outputs

• Output-to-output skew: <50ps

• Fail-safe digital input pins

2 Applications

• Replacement of up to 5 XOs

• ADAS Domain Controller

• Vehicle Instrument Cluster

• Autonomous Driving

• High Performance Compute

• Driver Monitoring System

• Automotive Gateways

• IVI

• LiDAR

• Radar

3 Description

The LMK3H0102-Q1 is a 2-output PCIe Gen 1

to Gen 7 compliant reference-less clock generator

with Spread Spectrum Clocking (SSC) support.

The part is based on TI proprietary Bulk Acoustic

Wave (BAW) technology and provides ±25ppm

clock outputs without any crystal or external clock

reference. The device can provide two SSC clocks,

two non-SSC clocks, or one SSC clock and one

non-SSC clock at the same time. The device

meets the full PCIe compliance from Gen 1 to

Gen 7, including Common Clock with or without

SSC, Separate Reference No Spread (SRNS), and

Separate Reference Independent Spread (SRIS).

The device can be easily configured through either

pins or I2C interface. An external DC/DC can be

used to power the device. Refer to Power Supply

Recommendations for detailed guidelines on power

supply filtering and sourcing from DC/DC.

For OTP default settings for each LMK3H0102Txx

configuration, refer to the LMK3H0102 Configuration

Guide.

更新时间:2025-11-1 14:12:00
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