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LMK1D2102RGTRG4.B中文资料

厂家型号

LMK1D2102RGTRG4.B

文件大小

1533.51Kbytes

页面数量

33

功能描述

LMK1D210x Low Additive Jitter LVDS Buffer

数据手册

下载地址一下载地址二到原厂下载

生产厂商

TI2

LMK1D2102RGTRG4.B数据手册规格书PDF详情

1 Features

• High-performance LVDS clock buffer family: up to

2 GHz

– Dual 1:2 differential buffer

– Dual 1:4 differential buffer

• Supply voltage: 1.71 V to 3.465 V

• Fail-safe input operation

• Low additive jitter: < max 60 fs RMS in 12-kHz to

20-MHz @ 156.25 MHz

– Very low phase noise floor: -164 dBc/Hz

(typical)

• Very low propagation delay < 575 ps max

• Output skew of 20 ps max

• Universal inputs accept LVDS, LVPECL, LVCMOS,

HCSL and CML signal levels.

• LVDS reference voltage, VAC_REF, available for

capacitive coupled inputs

• Industrial temperature range: –40°C to 105°C

• Packaged in

– LMK1D2102: 3-mm x 3-mm, 16-Pin VQFN

– LMK1D2104: 5-mm x 5-mm, 28-Pin VQFN

2 Applications

• Telecommunications and networking

• Medical imaging

• Test and measurement

• Wireless infrastructure

• Pro audio, video and signage

3 Description

The LMK1D210x clock buffer distributes two clock

inputs (IN0 and IN1) to a total of up to 8 pairs of

differential LVDS clock outputs (OUT0, OUT7) with

minimum skew for clock distribution. Each buffer block

consists of one input and up to 4 LVDS outputs. The

inputs can either be LVDS, LVPECL, HCSL, CML or

LVCMOS.

The LMK1D210x is specifically designed for driving

50-Ω transmission lines. In case of driving the inputs

in single-ended mode, the appropriate bias voltage as

shown in Figure 9-6 must be applied to the unused

negative input pin.

Using the control pin (EN), output banks can either

be enabled or disabled. If this pin is left open, two

buffers with all outputs are enabled, if switched to

a logic 0, both banks with all outputs are disabled

(static logic 0), if switched to a logic 1, one bank

and its outputs are disabled while another bank with

its outputs are enabled. The part supports a fail-safe

function. The device further incorporates an input

hysteresis which prevents random oscillation of the

outputs in the absence of an input signal.

The device operates in 1.8-V or 2.5-V or 3.3-V

supply environment and is characterized from –40°C

to 105°C (ambient temperature). The LMK1D210x

package variant is shown in the table below:

更新时间:2025-8-28 16:26:00
供应商 型号 品牌 批号 封装 库存 备注 价格
TI
23+
VQFN
5000
全新原装正品现货
TI(德州仪器)
24+
QFN16EP(3x3)
7350
现货供应,当天可交货!免费送样,原厂技术支持!!!
TI(德州仪器)
24+
QFN16EP(3x3)
1652
原装现货,免费供样,技术支持,原厂对接
Texas Instruments
25+
-
9350
独立分销商 公司只做原装 诚心经营 免费试样正品保证
TI
24+
con
35960
查现货到京北通宇商城
TI德州仪器
22+
24000
原装正品现货,实单可谈,量大价优
TI
2124+
VQFN28
993
一级代理,专注军工、汽车、医疗、工业、新能源、电力
TI(德州仪器)
QFN-28-EP(5x5)
原装元器件供应配套服务商
35000
TI
23+
VQFN28
8000
只做原装现货
TI
23+
VQFN28
10065
原装正品,有挂有货,假一赔十