位置:LM3S3748-IQC50-A0.A > LM3S3748-IQC50-A0.A详情

LM3S3748-IQC50-A0.A中文资料

厂家型号

LM3S3748-IQC50-A0.A

文件大小

5072.08Kbytes

页面数量

902

功能描述

Stellaris® LM3S3748 Microcontroller

数据手册

下载地址一下载地址二到原厂下载

生产厂商

TI2

LM3S3748-IQC50-A0.A数据手册规格书PDF详情

Product Features

The LM3S3748 microcontroller includes the following product features:

■ 32-Bit RISC Performance

– 32-bit ARM® Cortex™-M3 v7M architecture optimized for small-footprint embedded

applications

– System timer (SysTick), providing a simple, 24-bit clear-on-write, decrementing, wrap-on-zero

counter with a flexible control mechanism

– Thumb®-compatible Thumb-2-only instruction set processor core for high code density

– 50-MHz operation

– Hardware-division and single-cycle-multiplication

– Integrated Nested Vectored Interrupt Controller (NVIC) providing deterministic interrupt

handling

– 41 interrupts with eight priority levels

– Memory protection unit (MPU), providing a privileged mode for protected operating system

functionality

– Unaligned data access, enabling data to be efficiently packed into memory

– Atomic bit manipulation (bit-banding), delivering maximum memory utilization and streamlined

peripheral control

更新时间:2025-11-2 18:21:00
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