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description

The ‘76 contains two independent J-K flip-flops

with individual J-K, clock, preset, and clear

inputs. The ‘76 is a positive-edge-triggered flip-

flop. J-K input is loaded into the master while the

clock is high and transferred to the slave on the

high-to-low transition. For these devices the J

and K inputs must be stable while the clock is

high.

The ‘LS76A contain two independent negative-

edge-triggered flip-flops. The J and K inputs

must be stable one setup time prior to the high-

to-low clock transition for predicatble operation.

The preset and clear are asynchronous active

low inputs. When low they override the clock

and data inputs forcing the outputs to the steady

state levels as shown in the function table.

The SN5476 and the SN54LS76A are

characterized for operation over the full military

temperature range of —55°C to 125°C. The

SN7476 and the SN74LS76A are characterized

for operation from 0°C to 70°C.