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DS92LV2411SQSLASHNOPB.A中文资料

厂家型号

DS92LV2411SQSLASHNOPB.A

文件大小

1237Kbytes

页面数量

58

功能描述

DS92LV241x 5 to 50 MHz 24-Bit Channel Link II Serializer And Deserializer

数据手册

下载地址一下载地址二到原厂下载

生产厂商

TI2

DS92LV2411SQSLASHNOPB.A数据手册规格书PDF详情

1 Features

1• 24-Bit Data, 3–Bit Control, 5 to 50 MHz Clock

• Application Payloads up to 1.2 Gbps

• AC Coupled Interconnects: STP up to 10 m or

Coax 20+ m

• 1.8 V or 3.3 V Compatible LVCMOS I/O Interface

• Integrated Terminations on Ser and Des

• AT-SPEED BIST Mode and Reporting Pin

• Configurable by Pins or I2C Compatible Serial

Control Bus

• Power Down Mode Minimizes Power Dissipation

• >8 kV HBM ESD Rating

• SERIALIZER — DS92LV2411

– Supports Spread Spectrum Clocking (SSC) on

Inputs

– Data Scrambler for Reduced EMI

– DC-Balance Encoder for AC Coupling

– Selectable Output VOD and Adjustable De- plugemphasis

• DESERIALIZER — DS92LV2412

– Random Data Lock; no Reference Clock

Required

– Adjustable Input Receiver Equalization

– LOCK (Real Time Link Status) Reporting Pin

– Selectable Spread Spectrum Clock Generation

(SSCG) and Output Slew Rate Control (OS) to

Reduce EMI

2 Applications

• Embedded Video and Display

• Medical Imaging

• Factory Automation

• Office Automation — Printer, Scanner

• Security and Video Surveillance

• General Purpose Data Communication

3 Description

The DS92LV2411 (Serializer) and DS92LV2412

(Deserializer) chipset translates a parallel 24–bit LVCMOS data interface into a single high-speed CML

serial interface with embedded clock information. This

single serial stream eliminates skew issues between

clock and data, reduces connector size and

interconnect cost for transferring a 24-bit, or less, bus over FR-4 printed circuit board backplanes,

differential or coax cables.

In addition to the 24-bit data bus interface, the

DS92LV2411/12 also features a 3-bit control bus for

slow speed signals. This allows implementing video

and display applications with up to 24–bits per pixel

(RGB888).

Programmable transmit de-emphasis, receive

equalization, on-chip scrambling and DC balancing enables long distance transmission over lossy cables

and backplanes. The DS92LV2412 automatically

locks to incoming data without an external reference

clock or special sync patterns, providing easy “plugemphasis

and-go” or “hot plug” operation. EMI is minimized by the use of low voltage differential signaling, receiver

drive strength control, and spread spectrum clocking

capability.

The DS92LV2411/12 chipset is programmable though

an I2C interface as well as through Pins. A built-in

AT-SPEED BIST feature validates link integrity and

may be used for system diagnostics.

The DS92LV2411 is offered in a 48-Pin WQFN and

the DS92LV2412 is offered in a 60-Pin WQFN

package. Both devices operate over the full industrial

temperature range of -40°C to +85°C.

更新时间:2025-10-14 22:58:00
供应商 型号 品牌 批号 封装 库存 备注 价格
TI
2016+
WQFN48
2500
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24+
WQFN48
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TI
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NA
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23+
WQFN48
18204
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25+
25000
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TI/德州仪器
21+
WQFN48
36680
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25+
WQFN48
8880
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