位置:DS90UA102TRHSJQ1.A > DS90UA102TRHSJQ1.A详情
DS90UA102TRHSJQ1.A中文资料
DS90UA102TRHSJQ1.A数据手册规格书PDF详情
1FEATURES
• Digital Audio Deserializer
• Flexible Digital Audio Outputs, supporting I2S
(Stereo) and TDM (Multi-Channel) Formats
• Coaxial or Single Differential Pair Interconnect
• High Speed Serial Input Interface
• Very Low Latency (<15 μs)
• Bidirectional Control Interface Channel with
I2C Compatible Serial Control Bus
• Supports up to 8 Stereo I2S or TDM Audio
Outputs
• Supports Audio System Clocks from 10 MHz to
50 MHz
• Single 1.8V Supply
• 1.8V or 3.3V I/O Interface
• 4/4 Dedicated General Purpose Inputs/Outputs
• AC-Coupled STP or Coaxial Cable up to 15m
• DC-Balanced & Scrambled Data w/ Embedded
Clock
• Adaptive Cable Equalization
• At-Speed Link BIST Mode and LOCK Status
Pin
• Automotive Grade Product: AEC-Q100 Grade 2
Qualified
• Temperature Range: -40°C to 105°C
• ISO 10605 and IEC 61000-4-2 ESD Compliant
APPLICATIONS
• Automotive Infotainment Systems
• Active Noise Cancellation Systems
• Distributed Multi-Channel Audio Systems
DESCRIPTION
The DS90UA102-Q1 Deserializer, in conjunction with
the DS90UA101-Q1 Serializer, provides a solution for distribution of digital audio in multi-channel audio
systems. It receives a high-speed serialized interface
with an embedded clock over a single shielded
twisted pair or coaxial cable. The serial bus scheme
supports high speed forward data transmission and low speed bidirectional control channel over the link.
Consolidation of digital audio, general-purpose IO,
and control signals over a single differential pair
reduces the interconnect size and weight, while also
reducing design challenges related to skew and system latency.
The DS90UA102-Q1 Deserializer extracts the clock
and level shifts the signals from high-speed low voltage differential signaling to single-ended
LVCMOS. The device outputs up to eight digital audio
data channels, word/frame sync, bit clock, and
system clock.
Four dedicated general purpose input pins and four
general purpose output pins allow flexible
implementation of control and interrupt signals to and
from remote devices.
Adaptive equalization of the serial input stream
provides compensation for transmission medium
losses of the cable and reduces medium-induced
deterministic jitter.
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
DS90UA102TRHSJQ1 |
25+ |
48-WFQFN 裸露焊盘 |
9350 |
独立分销商 公司只做原装 诚心经营 免费试样正品保证 |
|||
TI |
三年内 |
1983 |
只做原装正品 |
||||
TI |
16+ |
WQFN |
10000 |
原装正品 |
|||
Texas Instruments |
24+ |
48-WQFN(7x7) |
56200 |
一级代理/放心采购 |
|||
TI |
25+ |
QFN-48 |
932 |
就找我吧!--邀您体验愉快问购元件! |
|||
TI/德州仪器 |
24+ |
WQFN-48 |
9600 |
原装现货,优势供应,支持实单! |
|||
TI |
23+ |
N/A |
560 |
原厂原装 |
|||
TI(德州仪器) |
24+/25+ |
10000 |
原装正品现货库存价优 |
||||
TI |
22+ |
48WQFN |
9000 |
原厂渠道,现货配单 |
|||
TI/德州仪器 |
25+ |
WQFN-48 |
8880 |
原装认准芯泽盛世! |
DS90UA102TRHSJQ1.A 资料下载更多...
DS90UA102TRHSJQ1.A 芯片相关型号
- 13706
- 141462-1
- 74AC11257DBR
- 74AC11257DW
- 74AC11257DW.A
- 74AC11257DWR
- AMT312S-0384-5000-02-CWS
- ATS-14H-74-C1-R0
- ATS-14H-75-C1-R0
- ATS-14H-79-C1-R0
- BZG03C12TR
- BZG03C12TR3
- BZG03C200
- DS26C32A-MD8.A
- DS90UA102TRHSJQ1
- DS90UA102TRHSRQ1
- DS90UA102TRHSRQ1.A
- DS90UA102TRHSTQ1
- DS90UA102TRHSTQ1.A
- S01BR1ABEAA
- SLG47004-A
- SLG47004-AP
- SLG47105-EV
- SLG47115
- SLG47115_V01
- SLG47115-EV
- SLG47115VTR
- SRD-SH-148DB5-F
- SRD-SH-148DB6-B
- SRD-SH-148DB6-F
Datasheet数据表PDF页码索引
- P1
- P2
- P3
- P4
- P5
- P6
- P7
- P8
- P9
- P10
- P11
- P12
- P13
- P14
- P15
- P16
- P17
- P18
- P19
- P20
- P21
- P22
- P23
- P24
- P25
- P26
- P27
- P28
- P29
- P30
- P31
- P32
- P33
- P34
- P35
- P36
- P37
- P38
- P39
- P40
- P41
- P42
- P43
- P44
- P45
- P46
- P47
- P48
- P49
- P50
- P51
- P52
- P53
- P54
- P55
- P56
- P57
- P58
- P59
- P60
- P61
- P62
- P63
- P64
- P65
- P66
- P67
- P68
- P69
- P70
- P71
- P72
- P73
- P74
- P75
- P76
- P77
- P78
- P79
- P80
- P81
- P82
- P83
- P84
- P85
- P86
- P87
- P88
- P89
- P90
- P91
- P92
- P93
- P94
- P95
- P96
- P97
- P98
- P99
- P100
- P101
- P102
- P103
- P104
- P105