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D9LVRA2IDEMR.A中文资料

厂家型号

D9LVRA2IDEMR.A

文件大小

1053Kbytes

页面数量

21

功能描述

DS90LVRA2 LVDS Dual Differential Line Receiver

数据手册

下载地址一下载地址二到原厂下载

生产厂商

TI2

D9LVRA2IDEMR.A数据手册规格书PDF详情

1 Features

• 600 Mbps (300 MHz) switching rates

• 50 ps differential skew (typical)

• 0.1 ns channel-to-channel skew (typical)

• 1.8 V power supply

• Flow-through pinout

• Power down high impedance on LVDS inputs

• Output slew rate control

• LVDS inputs accept LVDS/CML/LVPECL signals

• Conforms to ANSI/TIA/EIA-644 standard

• Pin compatible with DS90LV028A-Q1

• OPN variants

– Standard: 0°C to 70°C

– Industrial: -40°C to +85°C

2 Applications

• Communications equipment

• Enterprise systems

• Industrial

• Personal electronics

3 Description

The DS90LVRA2 is a dual CMOS differential line

receiver designed for applications requiring high input

common mode range, high data rates and CMOS

output with slew rate control. The device is designed

to support data rates of 600 Mbps (300 MHz) utilizing

Low Voltage Differential Signaling (LVDS) technology.

The DS90LVRA2 accepts low voltage (350 mV

typical) differential input signals and translates them

to 1.8 V CMOS output levels depending on power

supply voltage. The DS90LVRA2 has a flow-through

design for easy PCB layout.

The DS90LVRA2 and companion LVDS line driver

DS90LV027AQ provide a new alternative to high

power PECL/ECL devices for high speed point-topoint

interface applications.

更新时间:2025-11-28 15:01:00
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