Function, Pinout, and Drive Compatible

With FCT, F Logic, and AM29818

Reduced VOH (Typically = 3.3 V) Version of

Equivalent FCT Functions

Edge-Rate Control Circuitry for

Significantly Improved Noise

Characteristics

Ioff Supports Partial-Power-Down Mode

Operation

Matched Rise and Fall Times

Fully Compatible With TTL Input and

Output Logic Levels

8-Bit Pipeline and Shadow Register

ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

– 1000-V Charged-Device Model (C101)

CY29FCT818CT

– 64-mA Output Sink Current

– 32-mA Output Source Current

CY29FCT818ATDMB

– 20-mA Output Sink Current

– 3-mA Output Source Current

3-State Outputs

description

The CY29FCT818T contains a high-speed 8-bit general-purpose data pipeline register and a high-speed 8-bit

shadow register. The general-purpose register can be used in an 8-bit-wide data path for a normal system

application. The shadow register is designed for applications such as diagnostics in sequential circuits, where

it is desirable to load known data at a specific location in the circuit and to read the data at that location.

The shadow register can load data from the output of the device, and can be used as a right-shift register with

bit-serial input (SDI) and output (SDO), using DCLK. The data register input is multiplexed to enable loading

from the shadow register or from the data input pins, using PCLK. Data can be loaded simultaneously from the

shadow register to the pipeline register, and from the pipeline register to the shadow register, provided

setup-time and hold-time requirements are satisfied, with respect to the two independent clock inputs.

In a typical application, the general-purpose register in this device replaces an 8-bit data register in the normal

data path of a system. The shadow register is placed in an auxiliary bit-serial loop that is used for diagnostics.

During diagnostic operation, data is shifted serially into the shadow register, then transferred to the

general-purpose register to load a known value into the data path. To read the contents at that point in the data

path, the data is transferred from the data register into the shadow register, then shifted serially in the auxiliary

diagnostic loop to make it accessible to the diagnostics controller. This data then is compared with the expected

value to diagnose faulty operation of the sequential circuit.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,

preventing damaging current backflow through the device when it is powered down.