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CLVC374AQDWRG4Q1.B中文资料
CLVC374AQDWRG4Q1.B数据手册规格书PDF详情
1FEATURES
· Qualified for Automotive Applications
· ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
· Operates From 2 V to 3.6 V
· Inputs Accept Voltages to 5.5 V
· Max tpd of 8.5 ns at 3.3 V
· Typical VOLP (Output Ground Bounce) < 0.8 V
at VCC = 3.3 V, TA = 25°C
· Typical VOHV (Output VOH Undershoot) > 2 V
at VCC = 3.3 V, TA = 25°C
· Supports Mixed-Mode Signal Operation on All
Ports (5-V Input/Output Voltage With 3.3-V VCC)
· Ioff Supports Partial-Power-Down Mode
Operation
DESCRIPTION/ORDERING INFORMATION
The SN74LVC374A octal edge-triggered D-type flip-flop is designed for 2.7-V to 3.6-V VCC operation.
This device features 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance
loads. This device is particularly suitable for implementing buffer registers, input/output (I/O) ports, bidirectional
bus drivers, and working registers.
On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D)
inputs.
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or
low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the
bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines
without interface or pullup components.
OE does not affect internal operations of the latch. Old data can be retained or new data can be entered while
the outputs are in the high-impedance state.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in
a mixed 3.3-V/5-V system environment.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
TI/德州仪器 |
25+ |
原厂封装 |
10280 |
原厂授权代理,专注军工、汽车、医疗、工业、新能源! |
|||
TI/德州仪器 |
25+ |
原厂封装 |
10280 |
||||
TI/德州仪器 |
25+ |
原厂封装 |
9999 |
||||
TI/德州仪器 |
25+ |
原厂封装 |
10280 |
||||
TI |
25+23+ |
20-TSSO |
18752 |
绝对原装正品全新进口深圳现货 |
|||
TI |
16+ |
TSSOP |
10000 |
原装正品 |
|||
YAMAHA |
23+ |
QFN |
69820 |
终端可以免费供样,支持BOM配单! |
|||
Texas Instruments |
24+ |
20-TSSOP(0.173 |
56300 |
||||
TI |
25+ |
IC |
2000 |
就找我吧!--邀您体验愉快问购元件! |
|||
TI(德州仪器) |
2021+ |
TSSOP-20 |
499 |
CLVC374AQDWRG4Q1.B 资料下载更多...
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