Low Output Skew, Low Pulse Skew for

Clock-Distribution and Clock-Generation

Applications

Operates at 3.3-V VCC

LVTTL-Compatible Inputs and Outputs

Supports Mixed-Mode Signal Operation

(5-V Input and Output Voltages With 3.3-V

VCC)

Distributes One Clock Input to Ten Outputs

Outputs Have Internal Series Damping

Resistor to Reduce Transmission Line

Effects

Distributed VCC and Ground Pins Reduce

Switching Noise

State-of-the-Art EPIC-IIBE BiCMOS Design

Significantly Reduces Power Dissipation

Package Options Include Plastic

Small-Outline (DW) and Shrink

Small-Outline (DB) Packages

Available in Q-Temp Automotive

High Reliability Automotive Applications

Configuration Control / Print Support

Qualification to Automotive Standards

description

The CDC2351 is a high-performance clock-driver circuit that distributes one input (A) to ten outputs (Y) with

minimum skew for clock distribution. The output-enable (OE) input disables the outputs to a high-impedance

state. Each output has an internal series damping resistor to improve signal integrity at the load. The CDC2351

operates at nominal 3.3-V VCC.

The propagation delays are adjusted at the factory using the P0 and P1 pins. The factory adjustments ensure

that the part-to-part skew is minimized and is kept within a specified window. Pins P0 and P1 are not intended

for customer use and should be connected to GND.

The CDC2351 is characterized for operation from 0°C to 70°C. The CDC2351Q is characterized for operation

over the full automotive temperature range of –40°C to 125°C.