Qualified for Automotive Applications

Buffered Inputs

Common 3-State Output-Enable Control

3-State Outputs

Bus-Line Driving Capability

Typical Propagation Delay (Clock to Q):

15 ns at VCC = 5 V, CL = 15 pF, TA = 25
C

Fanout (Over Temperature Range)

Standard Outputs . . . 10 LSTTL Loads

Bus Driver Outputs . . . 15 LSTTL Loads

Balanced Propagation Delay and Transition

Times

Significant Power Reduction Compared to

LSTTL Logic ICs

VCC Voltage = 4.5 V to 5.5 V

Direct LSTTL Input Logic Compatibility,

VIL = 0.8 V (Max), VIH = 2 V (Min)

CMOS Input Compatibility, Il
1
A at VOL,

VOH

description/ordering information

The CD74HCT574 is an octal D-type flip-flop with

3-state outputs and the capability to drive 15 LSTTL

loads. The eight edge-triggered flip-flops enter data

into their registers on the low-to-high transition of the

clock (CP). The output enable (OE) controls the

3-state outputs and is independent of the register

operation. When OE is high, the outputs are in the

high-impedance state.