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CD4517BF3A.A中文资料

厂家型号

CD4517BF3A.A

文件大小

475.92Kbytes

页面数量

11

功能描述

CMOS Dual 64-Stage Static Shift Register

数据手册

下载地址一下载地址二到原厂下载

生产厂商

TI2

CD4517BF3A.A数据手册规格书PDF详情

Features:

® Low quiescent current — 10 nA/pkg (typ.)

atVpp=5V

® Clock frequency 12 MHz (typ.} at

Vpp=10V

® Schmitt trigger clock inputs allow operation

with very slow clock rise and fall times

= Capable of driving two low-power TTL loads,

one low- power Schottky TTL load, or two

HTL loads

® Three-state outputs

= 100% tested for quiescent current at 20 V

Standardized, symmetrical output

characteristics

®5-V, 10-V and 15-V parametric ratings

® Meets all requirements of JEDEC Tentative

Standard No. 13B,Standard Specifications

for Description of ‘B’ Series CMOS Devices”

更新时间:2025-10-7 11:06:00
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