Features:

= Retriggerable/resettable capability

® Trigger and reset propagation delays

independent of Ry, Cy

® Triggering from leading or trailing edge

® Q and Q buffered outputs available

® Separate resets

® Wide range of output-pulse widths

= 100% tested for maximum quiescent

current at 20 V

® Maximum input current of 1 uA at

18 V over full package-temperature

range; 100 nA at 18 V and 25°C

® Noise margin (full package-temperature

range): 1VatVpp=5V

2VatVpp=10V

25VatVpp=15 V

® 5.V, 10-V, and 15-VPrametric ratings

® Standardized, symmetrical output

characteristics

® Meets all requirements of JEDEC

Tentative Standard No. 13B,Stand-

ard Specifications for Description of ‘B

Series CMOS Devices.