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74LVTH16245ADLR中文资料
74LVTH16245ADLR数据手册规格书PDF详情
FEATURES
· Members of the Texas Instruments Widebus™
Family
· State-of-the-Art Advanced BiCMOS
Technology (ABT) Design for 3.3-V Operation
and Low Static-Power Dissipation
· Support Mixed-Mode Signal Operation (5-V
Input and Output Voltages With 3.3-V VCC)
· Support Unregulated Battery Operation Down
to 2.7 V
· Typical VOLP (Output Ground Bounce) <0.8 V
at VCC = 3.3 V, TA = 25°C
· Distributed VCC and GND Pins Minimize
High-Speed Switching Noise
· Flow-Through Architecture Optimizes PCB
Layout
· Ioff and Power-Up 3-State Support Hot
Insertion
· Bus Hold on Data Inputs Eliminates the Need
for External Pullup/Pulldown Resistors
· Latch-Up Performance Exceeds 500 mA Per
JESD 17
· ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
DESCRIPTION/ORDERING INFORMATION
The 'LVTH16245A devices are 16-bit (dual-octal) noninverting 3-state transceivers designed for low-voltage
(3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment.
The devices are designed for asynchronous communication between two data buses. The logic levels of the
direction-control (DIR) input and the output-enable (OE) input activate either the B-port outputs or the A-port
outputs or place both output ports into the high-impedance mode. The device transmits data from the A bus to
the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs are
activated. The input circuitry on both A and B ports is always active and must have a logic HIGH or LOW level
applied to prevent excess ICC and ICCZ.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown
resistors with the bus-hold circuitry is not recommended.
When VCC is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 1.5 V, OE should be tied to VCC through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the driver.
These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry
disables the outputs, preventing damaging current backflow through the devices when they are powered down.
The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,
which prevents driver conflict.
74LVTH16245ADLR产品属性
- 类型
描述
- 型号
74LVTH16245ADLR
- 功能描述
总线收发器 3.3-V ABT 16-Bit Bus Trncvr W/3-St Otpt
- RoHS
否
- 制造商
Fairchild Semiconductor
- 逻辑类型
CMOS
- 逻辑系列
74VCX
- 每芯片的通道数量
16
- 输入电平
CMOS
- 输出电平
CMOS
- 输出类型
3-State
- 高电平输出电流
- 24 mA
- 低电平输出电流
24 mA
- 传播延迟时间
6.2 ns
- 电源电压-最大
2.7 V, 3.6 V
- 电源电压-最小
1.65 V, 2.3 V
- 最大工作温度
+ 85 C
- 封装/箱体
TSSOP-48
- 封装
Reel
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
TI |
24+ |
SSOP |
50 |
原装现货假一罚十 |
|||
TI |
24+ |
SSOP |
25843 |
公司原厂原装现货假一罚十!特价出售!强势库存! |
|||
TI |
24+ |
SSOP |
13119 |
||||
TI/德州仪器 |
23+ |
SSOP48 |
50000 |
全新原装正品现货,支持订货 |
|||
TI |
25+ |
SOP |
3000 |
全新原装、诚信经营、公司现货销售 |
|||
74LVTH16245ADLR |
888 |
888 |
|||||
TI |
SSOP |
68500 |
一级代理 原装正品假一罚十价格优势长期供货 |
||||
TI |
2023+环保现货 |
SSOP |
4425 |
专注军工、汽车、医疗、工业等方案配套一站式服务 |
|||
TI/德州仪器 |
24+ |
NA/ |
4300 |
原装现货,当天可交货,原型号开票 |
|||
TI/德州仪器 |
24+ |
SSOP48 |
60000 |
74LVTH16245ADLRG4 价格
参考价格:¥4.2640
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