Flow-Through Architecture Optimizes

PCB Layout

Center-Pin VCC and GND Configurations

Minimize High-Speed Switching Noise

EPICE (Enhanced-Performance Implanted

CMOS) 1-mm Process

500-mA Typical Latch-Up Immunity at

125°C

Package Options Include Plastic

Small-Outline (D) and Thin Shrink

Small-Outline (PW) Packages, and

Standard Plastic 300-mil DIPs (N)

description

This device contains four independent 2-input AND gates. It performs the Boolean function

Y  A • B or Y  A
B in positive logic.

The 74AC11008 is characterized for operation from –40°C to 85°C.